PFS - Improving the Design for Testability of Integrated Circuits Using Formal Methods and AI Techniques
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Document typeConference report
Defense date2022-05
Rights accessRestricted access - publisher's policy
Except where otherwise noted, content on this work
is licensed under a Creative Commons license
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Attribution-NonCommercial-NoDerivs 4.0 International
CitationHabiby, P. Improving the Design for Testability of Integrated Circuits Using Formal Methods and AI Techniques. A: 27th IEEE European Test Symposium (ETS). 2022,
Publisher versionhttps://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding
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PF-8.pdf | 394,7Kb | Restricted access |