27th IEEE European Test Symposium (ETS): Barcelona, 23-27 may, 2022

 

The IEEE European Test Symposium (ETS) is Europe’s premier forum dedicated to presenting and discussing scientific results, emerging ideas, applications, hot topics and new trends in the area of electronic-based circuits and system testing, reliability, security and validation. ETS’22 is organized by UPC (Universitat Politècnica de Catalunya).

Informal acts. Final proceedings are available (with user UPC) on IEEExplore.

Summary

  • ETS 2021 BEST PAPER 

    Hellebrand, Sybille; Sonza Reorda, Matteo (2022-05)
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    Open Access

  • ETS 2022 Distinguished Service Award 

    Michael, Maria K.; Harrod, Peter; Hamdioui, Said (2022-05)
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    Open Access

  • ETS 2022 Foreword 

    Manich Bou, Salvador; Rodríguez, Rosa; Mir, Salvador; Bernardi, Paolo; Tille, Daniel; Bosio, Alberto (2022-05)
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    Open Access

  • ETS 2022 ORGANIZING COMMITTEE 

    Manich Bou, Salvador; Rodríguez Montañés, Rosa; Bernardi, Paolo; Tille, Daniel; Mir, Salvador; Bosio, Alberto; Arumi Delgado, Daniel; Gómez Pau, Álvaro; Cassano, Luca; Jiao, Hailong; Miclea, Liviu; Sanchez, Ernesto; Savino, Alessandro; Canal Corretger, Ramon; Eggersglüß, Stephan; Fransi, Sergi; Taouil, Mottaqiallah; Calomarde Palomino, Antonio; Weiner, Michael; Michael, Maria K.; Sonza Reorda, Matteo; Larsson, Erik; Vatajelu, Elena-Ioana; Stratigopoulos, Haralampos-G.; Parisi Baradad, Vicenç; Jiao, Hailong; Huang, Junlin; Li, Huawei; Chillarige, Sameer; Kameyama, Shuichi; Carro, Luigi; Su, Fei; Nicolici, Nicola; Huang, Shi-Yu (2022-05)
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    Open Access

  • ETS 2022 STEERING AND PROGRAM COMMITTEES 

    27th IEEE European Test Symposium (ETS) (2022-05)
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    Open Access

  • ETS 2022 SPONSORS 

    27th IEEE European Test Symposium (ETS) (2022-05)
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    Open Access

  • ET2 - Power Aware Test 

    Manchukonda, Likith Kumar; Natarajan, Karthikeyan; Arora, Manish (2022-05)
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    Power handling during test is an important requirement that needs to be considered during chip design, silicon bring-up, and in-system testing. In this tutorial, we will start by reviewing the importance of power and ...

  • K1 - Supercomputers and European Sovereignty ... 

    Valero Cortés, Mateo (2022-05)
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    Over that last 3 decades, we have witnessed a transition from closed software ecosystems being the foundation for HPC, enterprise, and business to open source software ecosystems based on Linux: from Arduino in the IoT ...

  • K2 - AI-Assisted Yield Learning 

    Huang, Yu (2022-05)
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    Root Cause Analysis (RCA) and Layout Pattern Analysis (LPA) are critical technologies for Diagnosis Driven Yield Learning in designing and manufacturing integrated circuits. Recent advancements of AI technologies can ...

  • K3 - DFX: Exploring the Design Space for Quality 

    Narayanun, Kaushik (2022-05)
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    Open Access
    The ever-increasing demands of high-performance visual and accelerated computing has resulted in GPUs becoming some of the most complex ASICs being built today. The last few years have also seen an explosion in demand ...

  • K4 - SiGe BiCMOS Technology with Advanced Integration Solutions for for mm-wave and THz Applications 

    Kaynak, Mehmet (2022-05)
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    In last decade, SiGe BiCMOS technologies open a new cost-efficient market first at mm-wave frequencies, then at sub-THz and THz range. Starting with the commercial use of automotive radars at 77 GHz, and the demand for ...

  • P1 - I Wish IJTAG would do this ... 

    Von Staudt, Hans-Martin; Portolan, Michele; Cote, J.F; Waayers, Tom; Rearick, Jeff; Keim, Martin (2022-05)
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    Open Access
    IEEE 1687-2014 gained traction in the test community very fast. Numerous innovations, publications, and implementations have been described, from both, industry and academia. Today, 7 years plus a few months after the ...

  • P2 - Can DPPM of AMS Circuits Be Accurately Estimated From Their Defect Coverage? 

    Zivkovic, Vladimir; Kruseman, Bram; Sunter, Stephen; Draxelmayr, Dieter; Stratigopoulos, Haralampos; Bhattacharya, Mayukh (2022-05)
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    Estimation of Defective Parts Per Million (DPPM) for digital circuits is no longer a straightforward task for nanotechnologies, even with the help of Williams-Brown or Seth-Agarwal formulas, ATPG and wellestablished fault ...

  • POS1 - FPGA Design Deobfuscation by Iterative LUT Modifications at Bitstream Level 

    Moraitis, Michail; Dubrova, Elena (2022-05)
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    We present an algorithm capable of defeating SRAM FPGA design obfuscation methods based on hardware opaque predicates. This is achieved by ensuring the full controllability of each instantiated look-up table input via ...

  • POS1 - Quality Assessment of RFET-based Logic Locking Protection Mechanisms using Formal Methods 

    Merten, Marcel; Huhn, Sebastian; Drechsler, Rolf (2022-05)
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    The high distribution of the manufacturing of Integrated Circuits (ICs) over different foundries yields long and untrustworthy supply chains. Logic locking is one prominent protection technique against malicious usage ...

  • POS1 - RRAM Crossbar-Based Fault-Tolerant Binary Neural Networks (BNNs) 

    Gebregiorgis, Anteneh; Zografou, Artemis; Hamdioui, Said (2022-05)
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    Computation-In Memory (CIM) using RRAM crossbar array is a promising solution to realize energy-efficient neuromorphic hardware, such as Binary Neural Networks (BNNs). However, RRAM faults restrict the applicability of ...

  • POS1 - Detection of Malicious FPGA Bitstreams using CNN-Based Learning 

    Chaudhuri, Jayeeta; Chakrabarty, Krishnendu (2022-05)
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    Multi-tenant FPGAs are increasingly being used in cloud computing technologies. Users are able to access the FPGA fabric remotely to implement custom accelerators in the cloud. However, sharing FPGA resources by untrusted ...

  • POS1 - Hierarchical Memory Diagnosis 

    Medeiros, G. C.; Fieback, M.; Gebregiorgis, A.; Taouil, M.; Poehls, L. B.; Hamdioui, S. (2022-05)
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    High-quality memory diagnosis methodologies are critical enablers for scaled memory devices as they reduce time to market and provide valuable information regarding test escapes and customer returns. This paper presents ...

  • POS1 - Novel Design For Test (DFT) Concept to Check the Spectral Mask Compliance Defined in the IEEE Std. 802.15.6-2012 of Wireless-Body-Area-Network (WBAN) IC-Devices 

    Oleszczuk, Alexander Stephan; Thouabtia, Mohamed; Allinger, Martin; Röber, Jürgen; Weigel, Robert (2022-05)
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    In this paper, we introduce a novel design for test (DFT) concept to check the compliance of wireless-body-areanetwork devices for medical applications with the spectral mask for IR-UWB and FM-UWB defined in chapter ...

  • POS1 - Graph Theory Approach for Multi-site ATE Board Parameter Extraction 

    Steenhoek, Abraham; Farayola, Praise O.; Bruce, Isaac; Chaganti, Shravan; Sheikh, Abalhassan; Ravi, Srivaths; Chen, Degang (2022-05)
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    This paper describes a low-cost technique for extracting parameters of interest for test boards used in multisite automatic test equipment (ATE). In the proposed approach, physical elements and nets on the PCB ...

  • POS1 - Prediction of Thermally Accelerated Aging Process at 28nm 

    Chanawala, Parvez Anwar; Hill, Ian; Sheikholeslam, S. Arash; Ivanov, André (2022-05)
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    We introduce a methodology to predict degradation in an SoC device undergoing a thermally accelerated aging process. SoCs are usually stressed at high temperatures and voltages (above nominal) to accelerate their aging ...

  • POS1 - A Generic Fast and Low Cost BIST Solution for CMOS Image Sensors 

    Lefevre, J.; Debaud, P.; Girard, P.; Virazel, A. (2022-05)
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    This paper demonstrates the generalization of a novel test solution embedded inside CMOS Image Sensors (CIS) to classify PASS/FAIL sensors during the test production phase. In [1], a Built-In Self-Test (BIST) solution ...

  • POS2 - Trojan Insertions of Fully Programmable Valve Arrays 

    Sinhabahu, Nadun; Li, Jian-De; Li, Katherine Shu-Min; Wang, Sying-Jyan; Ho, Tsung-Yi (2022-05)
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    Fully programmable valve arrays (FPVAs) have emerged as a new technology commonly used for biochemical applications. FPVAs have the programmability to perform any bioassay as long as users obtain the fluidic-level ...

  • POS2 - Smart Redundancy Schemes for ANNs Against Fault Attacks 

    Köylü, Troya Çagıl; Hamdioui, Said; Taouil, Mottaqiallah (2022-05)
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    Artificial neural networks (ANNs) are used to accomplish a variety of tasks, including safety critical ones. Hence, it is important to protect them against faults that can influence decisions during operation. In this ...

  • POS2 - A Novel Collaborative SSD Test Case Clustering Method Associating I/O Workload and Function Coverage 

    Jeong, Gyohun; Kim, Sangmin; Kim, Hyelyun; Lee, Sunghee (2022-05)
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    In this paper, we propose a TC clustering method that simultaneously considers two data groups: the I/O workload and the function coverage for a higher level of firmware testing. Subsequently, we introduce an ...

  • POS2 - Novel Method to Measure Common Mode Transient Immunity of Isolators 

    Thouabtia, Mohamed; Oleszczuk, Alexander; Girg, Thomas; Allinger, Martin (2022-05)
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    Common Mode Transient Immunity (CMTI) is one of the most important key parameters of an isolator. CMTI describes the ability of an isolation barrier to withstand fast common mode transients applied between two isolated ...

  • POS2 - On-Chip Training of Crosstalk Predictors to Fit Uncertainties 

    Sadeghi, Rezgar; Akbari, Ehsan; Saber, Mohamad Ali (2022-05)
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    Crosstalk noise has been strongly threatened the signal integrity of interconnects in new sub-micrometer technology nodes. The crosstalk prediction helps to avoid crosstalk consequences. Static crosstalk models cannot ...

  • POS2 - On-Line Reliability Estimation of Ring Oscillator PUF 

    Vinagrero Gutierrez, Sergio; Natale, Giorgio Di; Vatajelu, Elena-Ioana (2022-05)
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    In this paper we propose an on-line test methodology for RO-PUF reliability which enables high accuracy in the results since it is not based on predictive simplified models of the device variability and noise, but on ...

  • POS2 - Concurrent Error Detection for LSTM Accelerators 

    Nosrati, Nooshin; Ghasemi, Seyedeh Maryam; Roodsari, Mahboobe Sadeghipour; Navabi, Zainalabedin (2022-05)
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    The widespread usage of Long Short-Term Memory (LSTM) accelerators in time-series related applications necessitates using a protection mechanism against faults caused by wear-out and environmental effects. This paper ...

  • POS2 - Process and Runtime Variation Robustness for Spintronic-Based Neuromorphic Fabric 

    Ahmed, Soyed Tuhin; Mayahinia, Mahta; Hefenbrock, Michael; Münch, Christopher; Tahoori, Mehdi B. (2022-05)
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    Neural Networks (NN) can be efficiently accelerated using emerging resistive non-volatile memories (eNVM), such as Spin Transfer Torque Magnetic RAM(STT-MRAM). However, process variations and runtime temperature ...

  • POS2 - Effective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries 

    Cantoro, Riccardo; Garau, Francesco; Girard, Patrick; Kolahimahmoudi, Nima; Sartoni, Sandro; Reorda, Matteo Sonza; Virazel, Arnaud (2022-05)
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    In-field test of integrated circuits using Self-Test Libraries (STLs) is a widely used technique specifically suited to guarantee the processor’s correct behavior during the operative lifetime, as mandated by functional ...

  • S1 - X-Masking for In-System Deterministic Test 

    Mrugalski, Grzegorz; Rajski, Janusz; Tyszer, Jerzy; Włodarczak, Bartosz (2022-05)
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    In-system deterministic tests are used in safetysensitive designs to assure high test coverage, short test time, and low data volume, typically through an input-streaming-only approach that allows a quick test delivery. ...

  • S1 - Reducing Routing Overhead by Self-Enabling Functional Path Ring Oscillators 

    Kilian, Tobias; Hanel, Markus; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf (2022-05)
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    Automotive Microcontrollers (MCUs) are extensively tested to guarantee zero-defect quality. Performance screening is one of the critical factors to ensure that MCUs meet quality requirements. Ring Oscillator (RO) ...

  • S1 - Research on Path Delay with BTI Recovery Effect 

    Wu, Jiebing; Sun, Yongsheng; Wang, Yuan; Lin, Yukai; Fan, Mingna; Huang, Junlin (2022-05)
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    Aging degradation dominated by bias temperature instability (BTI) effect is one of the important considerations in system on chip (SOC) design margin. Research on path delay with BTI recovery effect which mitigates ...

  • S2 - Evaluating Security of New Locking SIB-based Architectures 

    Sao, Yogendra; Riaz, Anjum; Ahlawat, Satyadev; Ali, Sk. Subidh (2022-05)
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    The IEEE Std 1687 (IJTAG) provides enhanced access to the on-chip test instruments, which are included on the chip for test, post-silicon debug, in field maintenance, and diagnosis purposes. Although the on-chip instruments ...

  • S2 - A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing 

    Lapeyre, S.; Valette, N.; Merandat, M.; Flottes, M.-L.; Rouzeyre, B.; Virazel, A. (2022-05)
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    As any other circuits, secure devices need to be tested to ensure their reliability. Nevertheless, test infrastructures, such as JTAG or scan chains, can maliciously be used to steal secret data stored or processed in ...

  • S2 - TaintLock: Preventing IP Theft through Lightweight Dynamic Scan Encryption using Taint Bits 

    Talukdar, Jonti; Chaudhuri, Arjun; Chakrabarty, Krishnendu (2022-05)
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    We propose TaintLock, a lightweight dynamic scan data authentication and encryption scheme that performs perpattern authentication and encryption using taint and signature bits embedded within the test pattern. To prevent ...

  • S3 - A Data-driven Approach for Fault Detection in the Alternator Unit of Automotive Systems 

    Vijayan, Arunkumar; Tahoori, Mehdi B.; Kintzli, Ewald; Lohmann, Timm; Handl, Juergen Hans (2022-05)
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    Functional safety is considered as a prominent dependability attribute in today’s automotive world. It is extremely important to ensure safe operation of different automotive parts. An alternator unit is an electric ...

  • S3 - On Extracting Reliability Information from Speed Binning 

    Najafi-Haghi, Zahra Paria; Klemme, Florian; Amrouch, Hussam; Wunderlich, Hans-Joachim (2022-05)
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    Adaptive Voltage Frequency Scaling (AVFS) is an important means to overcome process-induced variability challenges for advanced high-performance circuits. AVFS requires and allows determining the maximum speed Fmax(Vdd) ...

  • S4 - Machine learning based soft error rate estimation of pass transistor logic in high-speed communication 

    Zhang, Z.; Lappas, J.; Chinazzo, A.; Weis, C.; Wu, Z.; Ni, L.; Wehn, N.; Tahoori, M. (2022-05)
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    Recent advanced high-speed communication systems, such as optical systems, require highest reliability at lowest possible power consumption. Thus, Pass Transistor Logic (PTL) is gaining lots of interest in these ...

  • S4 - Super Acceleration of Dilithium in MPSoCs Critical Environments 

    Sepúlveda, Johanna; Winkler, Dominik (2022-05)
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    Digital signature is a key security technology for authenticating systems and devices, thus enabling the existence of wide collaborative environments. This is also true for safetycritical systems that are constrained ...

  • S4 - Real-Time Control-Flow Integrity for Multicore Mixed-Criticality IoT Systems 

    Eftekhari Moghadam, Vahid; Prinetto, Paolo; Roascio, Gianluca (2022-05)
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    The spread of the Internet of Things (IoT) and the use of smart control systems in many mission-critical or safetycritical applications domains, like automotive or aeronautical, make devices attractive targets for ...

  • S5 - Enabling Coverage-Based Verification in Chisel 

    Dobis, Andrew; Damsgaard, Hans Jakob; Tolotto, Enrico; Hesse, Kasper; Petersen, Tjark; Schoeberl, Martin (2022-05)
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    Ever-increasing performance demands are pushing hardware designers towards designing domain-specific accelerators. This has created a demand for improving the overall efficiency of the hardware design and verification ...

  • S5 - SPINALFUZZ: Coverage-Guided Fuzzing for SpinalHDL Designs 

    Ruep, Katharina; Große, Daniel (2022-05)
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    Boosting hardware design productivity is a major plus of SpinalHDL, a Scala-based Hardware Description Language (HDL). SpinalHDL achieves this by providing object oriented programming, functional programming, and ...

  • S6 - WLAN Rx PER Test Implementation in ATE 

    Immanuel, Alban Haynse; Nithyanadam, Jeyendran (2022-05)
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    With the advert invention of wireless fidelity commonly called as Wi-Fi in the field of communication and computer networks a new era or revolution has taken place. In the recent twenty years, numerous IEEE 802.11 ...

  • S6 - AMS Test Vector Generation using AMS Verification and IEEE P1687.2 

    Zivkovic, Vladimir A.; Palazzi, Michele; Lam, Ming Chuen Alvan; Isager, Mogens (2022-05)
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    This paper presents a powerful combination of Analog Mixed-Signal (AMS) verification in combination with emerging IEEE P1687.2 standard, capable of enabling automation of the large part of test pattern generation flow ...

  • S7 - CNN-based Data-Model Co-Design for Efficient Test-termination Prediction 

    Wang, Hongfei; Wu, Zhanfei; Liu, Wei (2022-05)
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    Failure diagnosis is a software-based data-driven procedure. Collecting an excessive amount of fail data not only increases the overall test cost, but may also lead to degradation of diagnostic resolution. Test-termination ...

  • S7 - Optimized diagnostic strategy for embedded memories of Automotive Systems-on-Chip 

    Bernardi, P.; Insinga, G.; Paganini, G.; Cantoro, R.; Beer, P.; Coppetta, M.; Mautone, N.; Carnevale, G.; Scaramuzza, P.; Ullmann, R. (2022-05)
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    Embedded memories in Automotive Systems-on-Chip usually occupy a large die area portion. Consequently, their defectivity can strongly impact production yield for any automotive device. Along with the technology ramp-up ...

  • S7 - An Optimized Burn-In Stress Flow targeting Interconnections logic to Embedded Memories in Automotive Systems-on-Chip 

    Angione, F.; Bernardi, P.; Filipponi, G.; Sonza Reorda, M.; Appello, D.; Tancorre, V.; Ugioli, R. (2022-05)
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    The complexity of automotive Systems-on-a-Chip (SoCs) has enormously grown in the last decades. Today’s automotive SoCs are compelling due to technology improvements, different integration technologies, increased ...

  • S8 - On the Impact of Hardware Timing Errors on Stochastic Computing based Neural Networks 

    Neugebauer, Florian; Holst, Stefan; Polian, Ilia (2022-05)
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    Stochastic computing (SC) with its stream-based, probabilistic number representation promises large area and power benefits as well as increased error tolerance compared to conventional binary computing. While SC is ...

  • S8 - PVT Analysis for RRAM and STT-MRAM-based Logic Computation-in-Memory 

    Fieback, Moritz; Münch, Christopher; Gebregiorgis, Anteneh; Cardoso Medeiros, Guilherme; Taouil, Mottaqiallah; Hamdioui, Said; Tahoori, Mehdi (2022-05)
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    Emerging non-volatile resistive memories like Spin- Transfer Torque Magnetic Random Access Memory (STTMRAM) and Resistive RAM (RRAM) are in the focus of today’s research. They offer promising alternative computing ar ...

  • SP1 - Addressing the Challenges of 5G Production Test 

    Roos, Mark; Morris, Devin (2022-05)
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  • SP1 - RF and mmW test activities at CEA-Leti 

    González-Jiménez, José Luis (2022-05)
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  • SP1 - Feature selection techniques for indirect test and statistical calibration of mm-wave integrated circuits 

    Barragan, Manuel J.; Leger, Gildas; Cilici, Florent; Lauga-Larroze, Estelle; Mir, Salvador; Bourdel, Sylvain (2022-05)
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  • SP1 - Integrated Characterization Solutions for ICs and Devices Beyond 100 GHz 

    Margalef-Rovira, M.; Alaji, I.; Ghanem, H.; Ducournau, G.; Gaquiere, C. (2022-05)
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    This paper presents an innovative integrated loadpull bench at 160 GHz. The proposed system, which is designed in a 55-nm BiCMOS technology, is tailored to deal with all of the measurement functions including signal ...

  • SP2 - Test, Reliability and Functional Safety Trends for Automotive System-on-Chip 

    Angione, F.; Appello, D.; Aribido, J.; Athavale, J.; Bellarmino, N.; Bernardi, P.; Cantoro, R.; De Sio, C.; Foscale, T.; Gavarini, G.; Guerrero, J.; Huch, M.; Iaria, G.; Kilian, T.; Mariani, R.; Martone, R.; Ruospo, A.; Sanchez, E.; Schlichtmann, U.; Squillero, G.; Sonza Reorda, M.; Sterpone, L.; Tancorre, V.; Ugioli, R. (2022-05)
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    This paper encompasses three contributions by industry professionals and university researchers. The contributions describe different trends in automotive products, including both manufacturing test and run-time reliability ...

  • SP3 - Impact of Atmospheric and Space Radiation on Sensitive Electronic Devices 

    Matana Luza, Lucas; Wrobel, Frederic; Entrena, Luis; Dilillo, Luigi (2022-05)
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    Studying the radiation effects on electronic devices is essential for avionics and space systems. The shrinking technology nodes and increasing density of devices enhance the sensitivity of electronic systems to ionizing ...

  • SP4 - Machine Learning for Test, Diagnosis, Post-Silicon Validation and Yield Optimization 

    Amrouch, Hussam; Chakrabarty, Krishnendu; Pflüger, Dirk; Polian, Ilia; Sauer, Matthias; Sonza Reorda, Matteo (2022-05)
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    Recent breakthroughs in machine learning (ML) technology are shifting the boundaries of what is technologically possible in several areas of Computer Science and Engineering. This paper discusses ML in the context of ...

  • VES3 - Manufacturing and Silicon Lifecycle 

    Eggersgluess, Stephan; Tille, Daniel (2022-05)
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  • VES2 - DFT and Functional Safety 

    Eggersgluess, Stephan; Harrison, Lee (2022-05)
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    Machine Learning for DFT and ATPG Yu HUANG (HiSILICON Inc. – China)

  • VES1 - ATE and Test Quality 

    Eggersgluess, Stephan (2022-05)
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    Improving Test Quality and Reliability via In-system/In-field Testing Lee HARRISON (Siemens EDA – United Kingdom)

  • PFS - Using ML for Back-Annotating Low-Level Effects in a System-Level Framework 

    Basharkhah, Katayoon; Navabi, Zainalabedin (2022-05)
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    The work presented here is on back-annotation of physical properties into components of an embedded system for system-level simulation and facilitating fast design space exploration. Two important properties, power and ...

  • PFS - Tools for the Analysis of Simulation Dumps and the Evaluation of Burn-In Techniques 

    Calabrese, Andrea (2022-05)
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    While the importance of parallel hardware architectures has been increasing over the decades, software tends to be one step behind. In the testing and reliability field, noncommercial software is often designed with few ...

  • PFS - Strategies and Evaluation Methods to reach Ultra-Reliability in Automotive Systems-on-Chip 

    Iaria, Giusy (2022-05)
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    Embedded nano-electronic systems are becoming more prevalent in people’s daily lives. As a result, chip and embedded system manufacturing has become increasingly complicated and huge in recent years. Therefore, anomalous ...

  • PFS - Resiliency to Soft-Errors for Embedded Processors Using ML-based Checkers 

    Nosratii, Nooshin; Navabi, Zainalabedin; Jenihhin, Maksim (2022-05)
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    With deep submicron scaling, soft error has become one of the major reliability challenges for electronic systems. This work proposes a Machine Learning-based Checker (MLC) to protect hard-core processors against ...

  • PFS - Reliability Assessment of Neural Networks in GPUs 

    Guerrero-Balaguera, Juan-David (2022-05)
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    Currently, Deep learning and especially Convolutional Neural Networks (CNNs) have become a fundamental computational approach applied in a wide range of domains, including some safety-critical applications (e.g., automotive, ...

  • PFS - Qualification methodology for ISO26262 certification of automotive SoC systems 

    Fiorucci, Tiziano (2022-05)
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    This thesis proposes to develop a methodology for reliability metrics extraction for Electronic System. The targeted standard is ISO26262 and the declination of the different reliability metrics in the case of a digital ...

  • PFS - New techniques to detect and mitigate aging effects in advanced semiconductor technologies 

    Sartoni, Sandro (2022-05)
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    New semiconductor technologies for advanced applications are more prone to defects and imperfections related, among many different causes, to the manufacturing process, aging and cross-talks. These phenomena negatively ...

  • PFS - New Solutions for Generating Functional Sequences Maximizing the Sustained Switching Activity of Complex SoCs 

    Deligiannis, Nikolaos I. (2022-05)
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    It is well known that during device testing, the switching activity (SWA) of the circuit under test (CUT) is an important parameter that must be retained to a minimal value in order to avoid unwanted scenarios on the ...

  • PFS - Memristor-based security primitives 

    Vinagrero Gutierrez, Sergio; Natale, Giorgio Di; Vatajelu, Elena-Ioana (2022-05)
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    With the rapid growth of IoT and embedded devices, the development of low power, high density, high performance SoCs has pushed the embedded memories to their limits and opened the field to the development of emerging ...

  • PFS - Manufacturing Testing and Functional Safety techniques for Automotive SoCs 

    Angione, Francesco (2022-05)
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    Technology improvements, different integration technologies, increased heterogeneity, and many embedded memories contribute to System On Chip’s rising complexity (SoC), transforming high-volume manufacturing tests in ...

  • PFS - Improving the Design for Testability of Integrated Circuits Using Formal Methods and AI Techniques 

    Habiby, Payam (2022-05)
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  • PFS - Embedded memory testing: from power measurements to defect encoding 

    Insinga, Giorgio (2022-05)
    Conference report
    Restricted access - publisher's policy
    Memory requirements are constantly increasing in System on Chip (SoC) devices. To keep on with this demand, manufacturers rely on embedded Flash memories that are easily scalable and relatively cheap to manufacture. ...

  • PFS - DNN Hardware Reliability Assessment and Enhancement 

    Taheri, Mahdi (2022-05)
    Conference report
    Restricted access - publisher's policy
    Emergence of Deep Neural Networks (DNN) has led to a proliferation of artificial intelligence applications. Although applications of DNNs to real-world problems have become ubiquitous, there is a lack of understanding ...

  • PFS - Defect Analysis of a Spintronic Synapse for Spiking Neural Networks 

    Daddinounou, Salah; Vatajelu, Elena Ioana (2022-05)
    Conference report
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    Spiking Neural Networks are the third generation of artificial neural networks. To take full advantage of the energy efficiency of this biologically-plausible architecture, multiple ways have been proposed to implement ...

  • PFS - Control Flow Error Detection Techniques Assessment for Embedded Software Development and Validation 

    Solouki, Mohammadreza Amel; Sini, Jacopo; Violante, Massimo (2022-05)
    Conference report
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    In this work, a comparative study between established Control Flow Checking (CFC) techniques is presented. A novel test bench is used to inject permanent falts into an emulated microcontroller. This test bench manages ...

  • PFS - Analysis and Simulation of Logic-In-Memory Operations 

    Inglese, Pietro; Vatajelu, Elena Ioana; Natale, Giorgio Di (2022-05)
    Conference report
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    The technology evolution has tried to address the demand for faster computers. Despite the achieved speed-up in terms of memory and computation performances, the communication between the memories and the processor ...

  • PFS - A Platform for Structural Analysis of Logic Locking Using Machine Learning 

    Chakraborty, Prabuddha; Cruz, Jonathan; Alaql, Abdulrahman; Bhunia, Swarup (2022-05)
    Conference report
    Restricted access - publisher's policy
    Hardware obfuscation or logic locking (LL), relate to a method of safeguarding hardware intellectual property (IP) blocks against a variety of attacks, such as, IP theft, reverse engineering, and malicious alterations. ...

  • PFS - A Pipelined AUTOSAR Communication ASIP 

    Hamed, Ahmed; El-Kharashi, M. Watheq; Salem, Ashraf; Safar, Mona (2022-05)
    Conference report
    Restricted access - publisher's policy
    Securing communication operations between electronic control units (ECUs) is needed in modern vehicle architectures. This is because many attackers, nowadays, try to hack ECUs indirectly through vehicle to vehicle (V2V) ...

  • ICS2 - Industry Case-Study Presentations Session 2 

    Dobbelaere, Wim; Appello, Davide (2022-05)
    Conference report
    Open Access
    Evaluating Burn-In related Metrics for large Automotive Systems-on-Chip. Francesco ANGIONE1, Paolo BERNARDI1, Andrea CALABRESE1, Stefano QUER1, Davide APELLO2, Vincenzo TANCORRE2, Roberto UGIOLI2 1Politecnico di Torino, ...

  • ICS1 - Industry Case-Study Presentations Session 1 

    Dobbelaere, Wim; Appello, Davide (2022-05)
    Conference report
    Open Access
    Strategies for Enabling Quantum Development with Test and Measurement at millikelvin range focusing on pre-characterization. Jack DEGRAVE1, Philip KRANTZ2, Dong-Thuc KNOBBE1 1FormFactor, USA, 2Keysight, USA

  • Exhibitors and Sponsors 

    IEEE European Test Symposium 2022 (2022-05)
    Conference report
    Open Access