Real-time display of a multiprocessor spiking neural network
Document typeMaster thesis
Rights accessOpen Access
Artificial Neural Networks (ANNs) are powerful computational tools that are used to solve complex pattern recognition, function estimation and classification problems not manageable by other analytical tools. They are inspired by the structure and function of the human brain and throughout their development, they have been evolving towards more powerful and more biologically realistic models. A new generation of ANNs: Spiking Neural Networks (SNNs) have been developed. These networks emulate the neurobiological processing of information with temporal dynamics and precise timing. They are energy efficient and amenable to hardware application development. Such hardware SNNs work in real time and thus, having a real-time display makes full sense. This current thesis presents the realization of a real-time display using High-Definition Multimedia Interface (HDMI) connected to an ongoing project. This project uses HEENS (Hardware Emulator of Evolved Neural System) architecture to implement hardware SNNs on Zynq FPGAs (Field Programmable Gate Arrays). First of all, the communication to HDMI has been established, on two boards ZedBoard and Zynq ZC706. Screen resolution, video timings and color format have been studied. I2C (Inter-Integrated Circuit) communication has been examined and especially with the slave ADV7511, the HDMI transmitter, whose documentation has been also studied thoroughly. This transmitter has to be configured via I2C to be able to receive the HDMI signals and transmit them to the connector. Finally, all this acquired knowledge has enabled the actual implementation on the boards using VHDL (VHSIC (Very High Speed Integrated Circuit) Hardware Description Language) of the HDMI connection. As a result, bands of colors can be shown on monitor displays. Then, the representation of the Spiking Neural Network behavior has been made on screen, with plots to display the evolution in real time of the network. Communication has been established between the actual project architecture and the real-time display in order to receive the neural information and store it in a form which will allow their plot. At the same time, text generation has been implemented to be able to write text on screen. VHDL code has been developed to generate the plots with contours, ticks and labels as any standard chart. The first plot that has been made is the raster plot of the neuron spikes over time. Next, in order to monitor furthermore the Spiking Neural Network, another plot has been implemented to display internal neural parameters. Among these analog parameters, one of the most important is the membrane potential, whose plot has been studied more specifically. In the end, both plots: the raster plot and the membrane potential plot (for four chosen neurons to monitor), are displayed at the same time on the screen. To conclude, HDMI communication has been established on FPGA in order to monitor a Spiking Neural Network in real time. Two plots are displayed on the screen: the spikes over time and neural parameters for a few selected neurons of the network.