OpenCL-based FPGA accelerator for semi-global approximate string matching using diagonal bit-vectors
Visualitza/Obre
10.1109/FPL53798.2021.00036
Inclou dades d'ús des de 2022
Cita com:
hdl:2117/364999
Tipus de documentText en actes de congrés
Data publicació2021
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
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Abstract
An FPGA accelerator for the computation of the semi-global Levenshtein distance between a pattern and a reference text is presented. The accelerator provides an important benefit to reduce the execution time of read-mappers used in short-read genomic sequencing. Previous attempts to solve the same problem in FPGA use the Myers algorithm following a column approach to compute the dynamic programming table. We use an approach based on diagonals that allows for some resource savings while maintaining a very high throughput of 1 alignment per clock cycle. The design is implemented in OpenCL and tested on two FPGA accelerators. The maximum performance obtained is 91.5 MPairs/s for 100 × 120 sequences and 47 MPairs/s for 300 × 360 sequences, the highest ever reported for this problem.
CitacióCastells, D. [et al.]. OpenCL-based FPGA accelerator for semi-global approximate string matching using diagonal bit-vectors. A: International Conference on Field-Programmable Logic and Applications. "2021 31st International Conference on Field-Programmable Logic and Applications, FPL 2021: Dresden, Germany, 30 August–3 September 2021: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2021, p. 174-178. ISBN 978-1-6654-3759-2. DOI 10.1109/FPL53798.2021.00036.
ISBN978-1-6654-3759-2
Versió de l'editorhttps://ieeexplore.ieee.org/document/9556490
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FPL2021___Alternative_Myers.pdf | 655,2Kb | Visualitza/Obre |