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dc.contributor.authorGiesen León, Jeremy Jens
dc.contributor.authorMezzetti, Enrico
dc.contributor.authorAbella Ferrer, Jaume
dc.contributor.authorCazorla Almeida, Francisco Javier
dc.contributor.otherUniversitat Politècnica de Catalunya. Doctorat en Arquitectura de Computadors
dc.date.accessioned2022-02-17T11:08:27Z
dc.date.available2022-02-17T11:08:27Z
dc.date.issued2021
dc.identifier.citationGiesen, J. [et al.]. PRL: standardizing performance monitoring library for high-integrity real-time systems. A: IEEE International Conference on Computer Design. "2021 IEEE 39th International Conference on Computer Design, ICCD 2021: virtual conference, 24-27 October 2021: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2021, p. 344-348. ISBN 978-1-6654-3219-1. DOI 10.1109/ICCD53106.2021.00061.
dc.identifier.isbn978-1-6654-3219-1
dc.identifier.urihttp://hdl.handle.net/2117/362551
dc.description.abstractThe use of complex processors is becoming ubiquitous in High-Integrity Systems (HIS). To deal with processor’s increased complexity, Performance Monitoring Counters (PMCs) are increasingly used to reason on software behavior and provide the necessary evidence to support software certification. However, the use of PMCs in HIS is relatively recent and hence far from being standardized. As a result, software engineers are forced to resort to highly-customized, low-level programming of platform-specific PMC control registers, which is both error prone and time consuming. To cover this gap, we propose building on the PAPI library, a standardized performance monitoring solution in the mainstream domain, and develop a PMC Reading Library (PRL) for configuring and collecting traceable events while capturing HIS specific requirements and peculiarities. We instantiate PRL in a reference automotive configuration to show that PRL meets key HIS requirements: negligible footprint, limited and predictable overhead, and accuracy collecting hardware events by filtering out the impact of interrupts and context switches.
dc.description.sponsorshipThis work has been supported by the Spanish Ministry of Science and Innovation under grant PID2019-107255GBC21/AEI/10.13039/501100011033, the European Unions Horizon 2020 Framework Programme under grant agreement No. 878752 (MASTECS), and the European Research Council (ERC) grant agreement No. 772773 (SuPerCom).
dc.format.extent5 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshEmbedded computer systems
dc.subject.lcshReal-time data processing
dc.subject.otherPerformance counters
dc.subject.otherEmbedded systems
dc.subject.otherMultiprocessor system on chip
dc.titlePRL: standardizing performance monitoring library for high-integrity real-time systems
dc.typeConference report
dc.subject.lemacOrdinadors immersos, Sistemes d'
dc.subject.lemacTemps real (Informàtica)
dc.identifier.doi10.1109/ICCD53106.2021.00061
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/abstract/document/9643748
dc.rights.accessOpen Access
local.identifier.drac32562931
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/878752/EU/Multicore Analysis Service and Tools for Embedded Critical Systems/MASTECS
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/772773/EU/Sustainable Performance for High-Performance Embedded Computing Systems/SuPerCom
local.citation.authorGiesen, J.; Mezzetti, E.; Abella, J.; Cazorla, F. J.
local.citation.contributorIEEE International Conference on Computer Design
local.citation.publicationName2021 IEEE 39th International Conference on Computer Design, ICCD 2021: virtual conference, 24-27 October 2021: proceedings
local.citation.startingPage344
local.citation.endingPage348


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