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dc.contributor.authorAsifuzzaman, Kazi
dc.contributor.authorAbuelala, Mohamed
dc.contributor.authorHassan, Mohamed
dc.contributor.authorCazorla Almeida, Francisco Javier
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2022-02-09T10:10:33Z
dc.date.available2022-02-09T10:10:33Z
dc.date.issued2021-12
dc.identifier.citationAsifuzzaman, K. [et al.]. Demystifying the Characteristics of High Bandwidth Memory for Real-Time Systems. A: IEEE International Conference on Computer-Aided Design. "2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD): 1-4 Nov. 2021, Munich, Germany: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2021, p. 1-9. ISBN 978-1-6654-4507-8. DOI 10.1109/ICCAD51958.2021.9643473.
dc.identifier.isbn978-1-6654-4507-8
dc.identifier.issn1558-2434
dc.identifier.urihttp://hdl.handle.net/2117/362010
dc.description.abstractThe number of functionalities controlled by software on every critical real-time product is on the rise in domains like automotive, avionics and space. To implement these advanced functionalities, software applications increasingly adopt artificial intelligence algorithms that manage massive amounts of data transmitted from various sensors. This translates into unprecedented memory performance requirements in critical systems that the commonly used DRAM memories struggle to provide. High-Bandwidth Memory (HBM) can satisfy these requirements offering high bandwidth, low power and high-integration capacity features. However, it remains unclear whether the predictability and isolation properties of HBM are compatible with the requirements of critical embedded systems. In this work, we perform to our knowledge the first timing analysis of HBM. We show the unique structural and timing characteristics of HBM with respect to DRAM memories and how they can be exploited for better time predictability, with emphasis on increased isolation among tasks and reduced worst-case memory latency.
dc.description.sponsorshipThis work has been partially supported by the Spanish Ministry of Science and Innovation under grant PID2019-107255GB-C21/AEI/10.13039/501100011033; the European Union’s Horizon 2020 Framework Programme under grant agreement No. 878752 (MASTECS) and agreement No. 779877 (Mont-Blanc 2020); the European Research Council (ERC) grant agreement No. 772773 (SuPerCom); and the Natural Sciences and Engineering Research Council of Canada (NSERC)
dc.format.extent9 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Enginyeria del software
dc.subject.lcshSoftware architecture
dc.subject.lcshEmbedded systems (Computer systems)
dc.subject.otherSoftware
dc.subject.otherReal-time systems
dc.subject.otherMemory management
dc.subject.otherRandom access memory
dc.subject.otherBandwidth
dc.subject.otherAerospace electronics
dc.subject.otherSolids
dc.titleDemystifying the Characteristics of High Bandwidth Memory for Real-Time Systems
dc.typeConference report
dc.subject.lemacIntel·ligència artificial
dc.identifier.doi10.1109/ICCAD51958.2021.9643473
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/9643473
dc.rights.accessOpen Access
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/772773/EU/Sustainable Performance for High-Performance Embedded Computing Systems/SuPerCom
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/779877/EU/Mont-Blanc 2020, European scalable, modular and power efficient HPC processor/Mont-Blanc 2020
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/878752/EU/Multicore Analysis Service and Tools for Embedded Critical Systems/MASTECS
local.citation.contributorIEEE International Conference on Computer-Aided Design
local.citation.publicationName2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD): 1-4 Nov. 2021, Munich, Germany: proceedings
local.citation.startingPage1
local.citation.endingPage9


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