Improving the energy efficiency of the graphics pipeline by reducing overshading
Visualitza/Obre
Estadístiques de LA Referencia / Recolecta
Inclou dades d'ús des de 2022
Cita com:
hdl:2117/361567
Tipus de documentText en actes de congrés
Data publicació2021
Condicions d'accésAccés obert
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ProjecteCoCoUnit - CoCoUnit: An Energy-Efficient Processing Unit for Cognitive Computing (EC-H2020-833057)
Abstract
The most common task of GPUs is to render images in real time. When rendering a 3D scene, a key step is determining which parts of every object are visible in the final image. There are different approaches to solve the visibility problem, the Z-Test being the most common in modern GPUs. A main factor that significantly penalizes the energy efficiency of a GPU, especially in the mobile arena, is the so-called overshading, which happens when a portion of an object is shaded and rendered but finally occluded by another object. This useless work results in a waste of energy, however, the conventional Z-Test only eliminates a fraction of it. In this paper we present a novel microarchitectural technique, the ¿-Test, to drastically reduce overshading on a Tile-Based Rendering (TBR) architecture. The proposed approach leverages frame-to-frame coherence by taking advantage of the costly and valuable calculations made in previous frames. In particular, we propose to reuse information from the Z-Buffer of the previous frame, which is currently discarded. We make the observation that due to the existing frame-to-frame coherence, the Z-Buffer of a frame will have a high similarity in many areas with that of the previous frame. As a result, the proposed technique avoids many costly computations and off-chip memory accesses. Our experimental evaluation shows that ¿-Test reduces the average energy consumption of the overall GPU/Memory system by 15.7 % and the runtime of the evaluated benchmarks by 10.6 % on average.
CitacióCorbalán, D. [et al.]. Improving the energy efficiency of the graphics pipeline by reducing overshading. A: Jornadas Sarteco. "Avances en arquitectura y tecnología de computadores: Actas de las Jornadas SARTECO 20/21: Málaga, 21 a 24 de Septiembre de 2021". 2021, p. 125-134. ISBN 978-84-09-32487-3.
ISBN978-84-09-32487-3
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Sarteco2021.pdf | 883,0Kb | Visualitza/Obre |