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Microbenchmarks for detailed validation and tuning of hardware simulators
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Extended Abstract paper for Doctoral Colloquim at HPCS 2017. (284,7Kb) (Restricted access)
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hdl:2117/354235
Document typeConference report
Defense date2017
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
All rights reserved. This work is protected by the corresponding intellectual and industrial
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Abstract
Hardware simulators are indispensable tools for the computer architecture research. They are used by the academia and industry to prototype, explore and evaluate novel microarchitectural features.
CitationSánchez, R.; Radojkovic, P. Microbenchmarks for detailed validation and tuning of hardware simulators. A: International Conference on High Performance Computing and Simulation. "HPCS 2017: 2017 International Conference on High Performance Computing & Simulation: proceedings: 17-21 July 2017: Genoa, Italy". Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 881-883. ISBN 978-1-5386-3250-5. DOI 10.1109/HPCS.2017.135.
ISBN978-1-5386-3250-5
Publisher versionhttps://ieeexplore.ieee.org/document/8035174
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HPCS-2017_Sanchez.pdf![]() | Extended Abstract paper for Doctoral Colloquim at HPCS 2017. | 284,7Kb | Restricted access |