Recent Submissions

  • Loopback strategy for TSN-compliant traffic queueing and shaping in automotive gateways 

    González Mariño, Ángela; Fons, Francesc; Zhang, Haigang; Moreno Aróstegui, Juan Manuel (Institute of Electrical and Electronics Engineers (IEEE), 2021)
    Conference report
    Restricted access - publisher's policy
    In this work, authors present a Hardware (HW)based loopback strategy which is a new paradigm in networkprocessing, for HW efficient and cost-effective integration of TimeSensitive Networking (TSN) functionalities within ...
  • Traffic shaping engine for time sensitive networking integration within in-vehicle networks 

    González Mariño, Ángela; Fons, Francesc; Zhang, Haigang; Moreno Aróstegui, Juan Manuel (Institute of Electrical and Electronics Engineers (IEEE), 2021)
    Conference report
    Restricted access - publisher's policy
    In this work authors present a Traffic Shaping Engine (TSE) intended for the next generation of Time Sensitive Networking (TSN) compliant Network/System on Chip (NoC/SoC) devices, targeting especially the automotive industry. ...
  • Elastic queueing engine for time sensitive networking 

    González Mariño, Ángela; Fons, Francesc; Gharba, Ahmed; Ming, Li; Moreno Aróstegui, Juan Manuel (Institute of Electrical and Electronics Engineers (IEEE), 2021)
    Conference report
    Restricted access - publisher's policy
    In this work we introduce the concept of Elastic Queueing Engine (EQE) for Time Sensitive Networking (TSN) which is a new networking-optimized queueing strategy designed to maximize Quality of Service (QoS) and usability ...
  • Loopback strategy for in-vehicle network processing in automotive gateway network on chip 

    González Mariño, Ángela; Fons, Francesc; Zhang, Haigang; Moreno Aróstegui, Juan Manuel (Association for Computing Machinery (ACM), 2021)
    Conference report
    Restricted access - publisher's policy
    In this work, authors introduce an innovative loopback strategy for In-Vehicle Network (IVN) processing in automotive gateway (GW) Network on Chip. The new proposed architecture is fully HW centric, and allows performing ...
  • Hardware-software co-design for efficient and scalable real-time emulation of SNNs on the edge 

    Oltra Oltra, Josep Angel; Madrenas Boadas, Jordi; Zapata Rodríguez, Mireya; Vallejo Mancero, Bernardo Javier; Mata Hernández, Diana; Sato, Shigeo (Institute of Electrical and Electronics Engineers (IEEE), 2021)
    Conference report
    Restricted access - publisher's policy
    This paper introduces a novel workflow for Distributed Spiking Neural Network Architecture (DSNA). As such, the hardware implementation of Single Instruction Multiple Data (SIMD)-based Spiking Neural Network (SNN) requires ...