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OmpSs@FPGA framework for high performance FPGA computing

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10.1109/TC.2021.3086106
 
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hdl:2117/347629

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Haro Ruiz, Juan Miguel deMés informacióMés informació
Bosch Pons, JaumeMés informació
Filgueras Izquierdo, AntonioMés informació
Vidal, MiquelMés informació
Jiménez González, DanielMés informacióMés informacióMés informació
Álvarez Martínez, CarlosMés informacióMés informacióMés informació
Martorell Bofill, XavierMés informacióMés informacióMés informació
Ayguadé Parra, EduardMés informacióMés informacióMés informació
Labarta Mancho, Jesús JoséMés informacióMés informacióMés informació
Document typeArticle
Defense date2021-12-01
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
ProjectEuroEXA - Co-designed Innovation and System for Resilient Exascale Computing in Europe: From Applications to Silicon (EC-H2020-754337)
UPC-COMPUTACION DE ALTAS PRESTACIONES VIII (AEI-PID2019-107255GB-C22)
Abstract
This paper presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the extension of the programming model addressed specifically to FPGAs. OmpSs environment is built on top of Mercurium source to source compiler and Nanos++ runtime system. To address FPGA specifics Mercurium compiler implements several FPGA related features as local variable caching, wide memory accesses or accelerator replication. In addition, part of the Nanos++ runtime has been ported to hardware. Driven by the compiler this new hardware runtime adds new features to FPGA codes, such as task creation and dependence management, providing both performance increases and ease of programming. To demonstrate these new capabilities, different high performance benchmarks have been evaluated over different FPGA platforms using the OmpSs programming model. The results demonstrate that programs that use the OmpSs programming model achieve very competitive performance with low to moderate porting effort compared to other FPGA implementations.
CitationDe Haro, J. [et al.]. OmpSs@FPGA framework for high performance FPGA computing. "IEEE transactions on computers", 1 Desembre 2021, vol. 70, núm. 12, p. 2029-2042. 
URIhttp://hdl.handle.net/2117/347629
DOI10.1109/TC.2021.3086106
ISSN0018-9340
Publisher versionhttps://ieeexplore.ieee.org/document/9445632
Collections
  • Computer Sciences - Articles de revista [272]
  • Departament d'Arquitectura de Computadors - Articles de revista [957]
  • CAP - Grup de Computació d'Altes Prestacions - Articles de revista [380]
  • Doctorat en Arquitectura de Computadors - Articles de revista [135]
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