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dc.contributor.authorFell, Alexander
dc.contributor.authorMazure, Daniel J.
dc.contributor.authorGarcia, Teresa C.
dc.contributor.authorPerez, Borja
dc.contributor.authorTeruel, Xavier
dc.contributor.authorWilson, Pete
dc.contributor.authorDavis, John D.
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2021-06-18T14:41:18Z
dc.date.available2021-06-18T14:41:18Z
dc.date.issued2021
dc.identifier.citationFell, A. [et al.]. The Marenostrum experimental exascale platform (MEEP). "Supercomputing Frontiers and Innovations", 2021, vol. 8, núm. 1, p. 62-81.
dc.identifier.issn2313-8734
dc.identifier.urihttp://hdl.handle.net/2117/347523
dc.description.abstractNascent Open Source Instruction Set Architectures such as OpenPOWER or RISC-V, allow software/hardware co-designers to fully utilize the underlying hardware, modify it or extend it based on their needs. In this paper, we introduce the vision of the MareNostrum Experimental Exascale Platform (MEEP), an Open Source platform enabling software and hardware stack experimentation targeting the High-Performance Computing (HPC) ecosystem. MEEP is built with state-of-the-art FPGAs that support PCIe and High Bandwidth Memory (HBM), making it ideal to emulate chiplet-based HPC accelerators such as ACME, at the chip, package, and/or system level. MEEP provides an FPGA Shell containing standardized interfaces (I/O and memory), enabling an emulated accelerator to communicate with the hardware of the FPGA and ensures quick integration. The first demonstration of MEEP is mapping a new accelerator, the Accelerated Compute and Memory Engine (ACME), on to this digital laboratory. This enables exploration of this novel disaggregated architecture, which separates the computation from the memory operations, optimizing the accelerator for both dense (compute-bound) as well as sparse (memory-bandwidth bound) workloads. Dense workloads focus on the computational capabilities of the engine, while dedicated processors for memory accesses optimize non-unit stride and/or random memory accesses required by sparse workloads. MEEP is an open source digital laboratory that can provide a future environment for full-stack co-design and pre-silicon exploration. MEEP invites software developers and hardware engineers to build the application, compiler, libraries and the hardware to solve future challenges in the HPC, AI, ML, and DL domains.
dc.description.sponsorshipThis work has been supported by the EU H2020 project MareNostrum Experimental Exascale Platform (MEEP), and funded by the European Commission under the grant agreement No. 946002.
dc.format.extent20 p.
dc.language.isoeng
dc.publisherPublishing center of the South Ural State University
dc.rightsAttribution-NonCommercial 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshExascale computing
dc.subject.lcshSupercomputers
dc.subject.lcshSoftware architecture
dc.subject.lcshHardware
dc.subject.lcshOpen Source Architecture
dc.subject.otherHigh performance computing (HPC)
dc.subject.otherAccelerator
dc.subject.otherSoftware stack
dc.subject.otherOpen source hardware.
dc.titleThe Marenostrum experimental exascale platform (MEEP)
dc.typeArticle
dc.subject.lemacSupercomputadors
dc.identifier.doi10.14529/jsfi210105
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://superfri.org/superfri/article/view/369
dc.rights.accessOpen Access
dc.description.versionPostprint (published version)
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/946002/EU/The MareNostrum Experimental Exascale Platform/MEEP
local.citation.publicationNameSupercomputing Frontiers and Innovations
local.citation.volume8
local.citation.number1
local.citation.startingPage62
local.citation.endingPage81


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Except where otherwise noted, content on this work is licensed under a Creative Commons license : Attribution-NonCommercial 3.0 Spain