VIA: a smart scratchpad for vector units with application to sparse matrix computations
Visualitza/Obre
Estadístiques de LA Referencia / Recolecta
Inclou dades d'ús des de 2022
Cita com:
hdl:2117/346345
Tipus de documentText en actes de congrés
Data publicació2021-05
EditorBarcelona Supercomputing Center
Condicions d'accésAccés obert
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Abstract
Sparsematrix operations are critical kernels inmultiple
application domains such as High Performance Computing, artificial
intelligence and big data. Vector processing is widely used to
improve performance on mathematical kernels with dense matrices.
Unfortunately, existing vector architectures do not cope well with
sparse matrix computations, achieving much lower performance in
comparison with their dense counterparts.
To overcome this limitation, we present the Vector Indexed Architecture
(VIA), a novel hardware vector architecture that accelerates
applicationswith irregularmemory access patterns such as sparsematrix
computations. There are two main bottlenecks when computing
with sparse matrices: irregular memory accesses and index matching.
VIA addresses these two bottlenecks with a smart scratchpad that
is tightly coupled to the Vector Functional Units within the core. As
a result, VIA achieves significant performance speedup over highly
optimized state-of-the-artC++ algebra libraries.On average,VIAoutperforms
sparse matrix vector multiplication, sparse matrix addition
and sparse matrix matrix multiplication kernels by 4.22 , 6.14 and
6.00 respectively.
CitacióPavón Rivera, J.; Unsal, O.S.; Cristal Kestelman, A. VIA: a smart scratchpad for vector units with application to sparse matrix computations. A: . Barcelona Supercomputing Center, 2021, p. 56-58.
Fitxers | Descripció | Mida | Format | Visualitza |
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BSC_DS-2021-19_VIA A Smart Scratchpad.pdf | 570,7Kb | Visualitza/Obre |