Technological layer

Rubio Sola, Jose Antonio; Canal Corretger, Ramon

doi:10.1049/PBCS057E_ch1

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Rubio Sola, Jose Antonio

Canal Corretger, Ramon

Document typePart of book or chapter of book

Defense date2020-10

PublisherThe Institution of Engineering and Technology

Rights accessRestricted access - publisher's policy

All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder

Abstract

This chapter describes the fundamental characteristics of Complementary Metal-Oxide-Semiconductor (CMOS) technology, and how it can be assessed for system reliability studies. After some definitions, the dominating manufacturing technologies are described together with its advantages and disadvantages. Then, the core memory circuits present in today's computing systems are presented. Finally, the chapter provides an evaluation of these memory circuits when considering reliability across technology nodes.

CitationRubio, A.; Canal, R. Technological layer. A: "Cross-layer reliability of computing systems". Londres: The Institution of Engineering and Technology, 2020, p. 3-22.

URIhttp://hdl.handle.net/2117/341025

DOI10.1049/PBCS057E_ch1

ISBN9781785617980

Publisher versionhttp://www.theiet.org/

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