A memristor-based quaternary memory with adaptive noise tolerance
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hdl:2117/336877
Document typeConference report
Defense date2020
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
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Abstract
Considering the constraints of CMOS technology progress at the nano-domain, memristor technology is one of the preferred alternatives to merge with and substitute CMOS-based memory circuits. At the same time to increase the bandwidth of memories, increase storage density and decrease the interconnection complexity of circuits, multiple-valued logic (MVL) based circuit memories are being introduced as an efficient alternative. As resistive random access memory (ReRAM) is a non-volatile memory and memristor cells allow analog multilevel behavior, they are suitable device to store multiple-level bits of information. Different sources of noise and perturbances may affect the original values of data during the transferring and storing processes. A hybrid scenario based on CMOS and memristor technology is proposed here to recover the stored multiple noisy-perturbed values of resistive random-access memory in an efficient way. To show the correctness of the proposed method, affected images are simulated with Matlab software at system level showing its efficiency.
CitationDabaghi Zarandi, A.; Rubio, A.; Reza Reshadinezhad, M. A memristor-based quaternary memory with adaptive noise tolerance. A: Conference on Design of Circuits and Integrated Systems. "2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS): Segovia, Spain: november 18-20, 2020: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2020, ISBN 978-1-7281-9132-4. DOI 10.1109/DCIS51330.2020.9268675.
ISBN978-1-7281-9132-4
Publisher versionhttps://ieeexplore.ieee.org/document/9268675
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