An academic RISC-V silicon implementation based on open-source components
Document typeConference report
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
The design presented in this paper, called preDRAC, is a RISC-V general purpose processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The preDRAC processor is the first RISC-V processor designed and fabricated by a Spanish or Mexican academic institution, and will be the basis of future RISC-V designs jointly developed by these institutions. This paper summarizes the design tasks, for FPGA first and for SoC later, from high architectural level descriptions down to RTL and then going through logic synthesis and physical design to get the layout ready for its final tapeout in CMOS 65nm technology.
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CitationAbella, J. [et al.]. An academic RISC-V silicon implementation based on open-source components. A: Conference on Design of Circuits and Integrated Systems. "2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)". Institute of Electrical and Electronics Engineers (IEEE), 2020, p. 1-6. ISBN 978-1-7281-9132-4. DOI 10.1109/DCIS51330.2020.9268664.
- Doctorat en Arquitectura de Computadors - Ponències/Comunicacions de congressos 
- HIPICS - High Performance Integrated Circuits and Systems - Ponències/Comunicacions de congressos 
- Computer Sciences - Ponències/Comunicacions de congressos 
- CAP - Grup de Computació d'Altes Prestacions - Ponències/Comunicacions de congressos 
- Departament d'Arquitectura de Computadors - Ponències/Comunicacions de congressos [1.685]
- Departament d'Enginyeria Electrònica - Ponències/Comunicacions de congressos [1.525]
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