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Synchronizable compact CMOS oscillator
dc.contributor.author | Villar Piqué, Gerard |
dc.contributor.author | Alarcón Cot, Eduardo José |
dc.contributor.author | Vidal López, Eva María |
dc.contributor.author | Cosp Vilella, Jordi |
dc.contributor.author | Madrenas Boadas, Jordi |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2020-11-02T14:26:26Z |
dc.date.issued | 2005-01 |
dc.identifier.citation | Villar, G. [et al.]. Synchronizable compact CMOS oscillator. "Analog integrated circuits and signal processing", 2005, vol. 42, núm. 2, p. 179-183. |
dc.identifier.issn | 0925-1030 |
dc.identifier.uri | http://hdl.handle.net/2117/331144 |
dc.description.abstract | This letter describes the design and implementation of a synchronizable compact CMOS oscillator. By using a fully differential topology, a reduction in area occupancy together with an improved robustness in front of on-chip interferences is achieved. Post-layout simulation results and experimental results for a standard CMOS 0.35 µ m technology are presented to validate the functionality of the tunable oscillator. |
dc.format.extent | 5 p. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
dc.subject | Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Processament del senyal |
dc.subject.lcsh | Integrated circuits |
dc.subject.lcsh | Signal processing |
dc.subject.other | Synchronizable oscillator |
dc.subject.other | CMOS relaxation oscillator |
dc.subject.other | Neuromorphic analog VLSI |
dc.title | Synchronizable compact CMOS oscillator |
dc.type | Article |
dc.subject.lemac | Circuits integrats |
dc.subject.lemac | Tractament del senyal |
dc.contributor.group | Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits |
dc.contributor.group | Universitat Politècnica de Catalunya. ISSET - Integrated Smart Sensors and Health Technologies |
dc.identifier.doi | 10.1007/s10470-005-5752-2 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | https://link.springer.com/article/10.1007%2Fs10470-005-5752-2 |
dc.rights.access | Restricted access - publisher's policy |
local.identifier.drac | 659275 |
dc.description.version | Postprint (published version) |
dc.date.lift | 10000-01-01 |
local.citation.author | Villar, G.; Alarcon, E.; Vidal, E.; Cosp, J.; Madrenas, J. |
local.citation.publicationName | Analog integrated circuits and signal processing |
local.citation.volume | 42 |
local.citation.number | 2 |
local.citation.startingPage | 179 |
local.citation.endingPage | 183 |
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