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Design and implementation of an architecture-aware hardware runtime for heterogeneous systems
| dc.contributor.author | de Haro Ruiz, Juan Miguel |
| dc.contributor.author | Bosch Pons, Jaume |
| dc.contributor.author | Jiménez González, Daniel |
| dc.date.accessioned | 2020-10-30T12:40:08Z |
| dc.date.available | 2020-10-30T12:40:08Z |
| dc.date.issued | 2020-05 |
| dc.identifier.citation | De Haro Ruiz, J.M.; Bosch Pons, J.; Jiménez González, D. Design and implementation of an architecture-aware hardware runtime for heterogeneous systems. A: . Barcelona Supercomputing Center, 2020, p. 57-58. |
| dc.identifier.uri | http://hdl.handle.net/2117/331025 |
| dc.description.abstract | Parallel computing has become the norm to gain performance in multicore and heterogeneous systems. Many programming models allow to exploit this parallelism with easy to use tools. In this work we focus on task-based programming models. The parallelism is expressed with pieces of work called tasks that have data dependencies among them, and therefore have to be executed in a certain order. However, tasks that don’t depend on any other running task can be executed in parallel. |
| dc.format.extent | 2 p. |
| dc.language | en |
| dc.language.iso | eng |
| dc.publisher | Barcelona Supercomputing Center |
| dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
| dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
| dc.subject.lcsh | High performance computing |
| dc.subject.other | heterogeneous systems |
| dc.subject.other | task-dependence analysis |
| dc.subject.other | High-performance computing |
| dc.subject.other | FPGA |
| dc.subject.other | task-based programming models |
| dc.title | Design and implementation of an architecture-aware hardware runtime for heterogeneous systems |
| dc.type | Conference report |
| dc.subject.lemac | Càlcul intensiu (Informàtica) |
| dc.rights.access | Open Access |
| local.citation.startingPage | 57 |
| local.citation.endingPage | 58 |
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