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Exceeding conservative limits: A consolidated analysis on modern hardware margins
dc.contributor.author | Papadimitriou, George |
dc.contributor.author | Chatzidimitriou, Athanansios |
dc.contributor.author | Gizopoulos, Dimitris |
dc.contributor.author | Reddi, Vijay Janapa |
dc.contributor.author | Leng, Jingwen |
dc.contributor.author | Salami, Behzad |
dc.contributor.author | Unsal, Osman Sabri |
dc.contributor.author | Cristal Kestelman, Adrián |
dc.contributor.other | Universitat Politècnica de Catalunya. Doctorat en Arquitectura de Computadors |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.contributor.other | Barcelona Supercomputing Center |
dc.date.accessioned | 2020-10-15T07:29:56Z |
dc.date.available | 2020-10-15T07:29:56Z |
dc.date.issued | 2020-06 |
dc.identifier.citation | Papadimitriou, G. [et al.]. Exceeding conservative limits: A consolidated analysis on modern hardware margins. "IEEE transactions on device and materials reliability", Juny 2020, vol. 20, núm. 2, p. 341-350. |
dc.identifier.issn | 1530-4388 |
dc.identifier.uri | http://hdl.handle.net/2117/330274 |
dc.description | © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. |
dc.description.abstract | Modern large-scale computing systems (data centers, supercomputers, cloud and edge setups and high-end cyber-physical systems) employ heterogeneous architectures that consist of multicore CPUs, general-purpose many-core GPUs, and programmable FPGAs. The effective utilization of these architectures poses several challenges, among which a primary one is power consumption. Voltage reduction is one of the most efficient methods to reduce power consumption of a chip. With the galloping adoption of hardware accelerators (i.e., GPUs and FPGAs) in large datacenters and other large-scale computing infrastructures, a comprehensive evaluation of the safe voltage reduction levels for each different chip can be employed for efficient reduction of the total power. We present a survey of recent studies in voltage margins reduction at the system level for modern CPUs, GPUs and FPGAs. The pessimistic voltage guardbands inserted by the silicon vendors can be exploited in all devices for significant power savings. On average, voltage reduction can reach 12% in multicore CPUs, 20% in manycore GPUs and 39% in FPGAs. |
dc.description.sponsorship | The research leading to results in the CPU part was funded by the EU H2020 Programme under the UniServer project (http://www.uniserver2020.eu), grant agreement n◦ 688540. Also, the research leading to results in FPGA part was funded by the EU H2020 Programme under the LEGaTO project (https://legato-project.eu), grant agreement n◦ 780681. |
dc.format.extent | 10 p. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Field programmable gate arrays |
dc.subject.lcsh | Microprocessors -- Energy consumption |
dc.subject.lcsh | Graphics processing units |
dc.subject.other | Voltage margins |
dc.subject.other | Power consumption |
dc.subject.other | Energy efficiency |
dc.subject.other | Multicore CPU |
dc.subject.other | Many-core GPU |
dc.subject.other | FPGA |
dc.subject.other | Accelerators |
dc.title | Exceeding conservative limits: A consolidated analysis on modern hardware margins |
dc.type | Article |
dc.subject.lemac | Matrius de portes programables per l'usuari |
dc.subject.lemac | Microprocessadors -- Consum d'energia |
dc.subject.lemac | Unitats de processament gràfic |
dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.identifier.doi | 10.1109/TDMR.2020.2989813 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | https://ieeexplore.ieee.org/abstract/document/9076808 |
dc.rights.access | Open Access |
local.identifier.drac | 28091256 |
dc.description.version | Postprint (author's final draft) |
dc.relation.projectid | info:eu-repo/grantAgreement/EC/H2020/780681/EU/Low Energy Toolset for Heterogeneous Computing/LEGaTO |
local.citation.author | Papadimitriou, G.; Chatzidimitriou, A.; Gizopoulos, D.; Reddi, V.; Leng, J.; Salami, B.; Unsal, O.; Cristal, A. |
local.citation.publicationName | IEEE transactions on device and materials reliability |
local.citation.volume | 20 |
local.citation.number | 2 |
local.citation.startingPage | 341 |
local.citation.endingPage | 350 |
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