dc.contributor | Aguasca Solé, Alberto |
dc.contributor | Broquetas Ibars, Antoni |
dc.contributor.author | Blanco Caamaño, Ramon |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament de Teoria del Senyal i Comunicacions |
dc.date.accessioned | 2020-10-01T07:26:24Z |
dc.date.issued | 2020-07-15 |
dc.identifier.uri | http://hdl.handle.net/2117/329584 |
dc.description.abstract | In this dissertation, a study and a practical implementation of an acquisition and preprocessing unit are provided for the digitization and suitability of the radar signals. The hardware solution allows the digitization of radar signals at an appropriate speed and subsequently transfers the preprocessed data into a suitable interface. The system must include a memory and a direct connection interface for storage and external communication with a computer, respectively. The final results are obtained by processing the sampled data. This task is performed by a computer with a specific processing software designed by the department. The designed solution must be restrictive in terms of size, weight and portability. A low power hardware is needed in order to feed the unit through external batteries, keeping a suitable performance. From a commercial point of view, a cost effective and high integrated solution is needed. |
dc.language.iso | eng |
dc.publisher | Universitat Politècnica de Catalunya |
dc.subject | Àrees temàtiques de la UPC::Enginyeria de la telecomunicació |
dc.subject.lcsh | Synthetic aperture radar |
dc.subject.lcsh | Electronic circuits |
dc.subject.other | RADAR |
dc.subject.other | FPGA |
dc.subject.other | EMBEDDED SYSTEMS |
dc.subject.other | SIGNAL PROCESSING. |
dc.title | FPGA based Radar acquisition and preprocessing unit |
dc.title.alternative | FPGA based Radar acquisition and preprocessing unit |
dc.type | Master thesis |
dc.subject.lemac | Radar d'obertura sintètica |
dc.subject.lemac | Circuits electrònics |
dc.identifier.slug | ETSETB-230.149702 |
dc.rights.access | Restricted access - confidentiality agreement |
dc.date.lift | 2030-10-01T07:26:24Z |
dc.date.updated | 2020-07-29T05:52:35Z |
dc.audience.educationlevel | Màster |
dc.audience.mediator | Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona |
dc.audience.degree | MÀSTER UNIVERSITARI EN ENGINYERIA DE TELECOMUNICACIÓ (Pla 2013) |