Envíos recientes

  • Gestión de contenidos en caches operando a bajo voltaje 

    Ferrerón, Alexandra; Alastruey, Jesús; Suárez Gracía, Dario; Monreal Arnal, Teresa; Ibáñez Marín, Pablo Enrique; Viñals Yúfera, Víctor (2016)
    Texto en actas de congreso
    Acceso abierto
    La eficiencia energética de las caches en chip puede mejorarse reduciendo su voltaje de alimentación (Vdd ). Sin embargo, este escalado de Vdd está limitado a una tensión Vddmin por debajo de la cual algunas celdas SRAM ...
  • Selección de contenidos basada en reuso para caches compartidas en exclusión 

    Díaz Maag, Javier; Monreal Arnal, Teresa; Viñals Yúfera, Víctor; Ibáñez Marín, Pablo Enrique; Llaberia Griño, José María (2015)
    Texto en actas de congreso
    Acceso abierto
    Publicaciones previas revelan que el flujo de referencias que llega a la cache compartida (SLLC) de un chip multiprocesador muestra poca localidad temporal. Sin embargo, muestra localidad de reuso, es decir, los bloques ...
  • A comparison of cache hierarchies for SMT processors 

    Suárez Gracía, Dario; Monreal Arnal, Teresa; Viñals Yúfera, Víctor (Universidad de La Laguna. Servicio de Publicaciones, 2011)
    Texto en actas de congreso
    Acceso abierto
    In the multithread and multicore era, programs are forced to share part of the processor structures. On one hand, the state of the art in multithreading describes how efficiently manage and distribute inner resources such ...
  • An adaptive controller to save dynamic energy in LP-NUCA 

    Suárez Gracía, Dario; Monreal Arnal, Teresa; Viñals Yúfera, Víctor (Universidad de La Laguna. Servicio de Publicaciones, 2011)
    Texto en actas de congreso
    Acceso abierto
    Portable devices often demand powerful processors to run computing intensive applications, such as video playing or gaming, and ultra low en-ergy consumption to extend device uptime. Such con-flicting requirements are hard ...
  • Oblivious routing schemes in extended generalized fat tree networks 

    Rodríguez Herrera, Germán; Minkenberg, Cyriel; Beivide Palacio, Ramon; Luijten, Ronald P.; Labarta Mancho, Jesús José; Valero Cortés, Mateo (IEEE Computational Intelligence Society, 2009)
    Texto en actas de congreso
    Acceso abierto
    A family of oblivious routing schemes for fat trees and their slimmed versions is presented in this work. First, two popular oblivious routing algorithms, which we refer to as S-mod-k and D-mod-k, are analyzed in detail. ...
  • Selección del tamaño del banco de registros y de la política de asignación de recursos en procesadores SMT 

    Alastruey, Jesús; Monreal Arnal, Teresa; Cazorla Almeida, Francisco Javier; Viñals Yúfera, Víctor; Valero Cortés, Mateo (Thomson Editores Spain, 2007)
    Texto en actas de congreso
    Acceso abierto
    Este trabajo estudia el impacto del tamaño del banco de registros físico (BRF) en el rendimiento de procesadores Simultaneous Multithreading (SMT). Como es bien conocido, el BRF es un componente crítico en este tipo de ...
  • ReD: A policy based on reuse detection for demanding block selection in last-level Caches 

    Díaz Maag, Javier; Ibáñez Marín, Pablo Enrique; Monreal Arnal, Teresa; Viñals Yúfera, Víctor; Llaberia Griñó, José M. (2017)
    Texto en actas de congreso
    Acceso abierto
    In this paper, we propose a new block selection policy for Last-Level Caches (LLCs) that decides, based on Reuse Detection, whether a block coming from main memory is inserted, or not, in the LLC. The proposed policy, ...
  • Fluid communities: a competitive, scalable and diverse community detection algorithm 

    Pares, Ferran; García Gasulla, Darío; Vilalta, Armand; Moreno, Jonatan; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Cortés, Ulises; Suzumura, Toyotaro (Springer, 2017)
    Texto en actas de congreso
    Acceso restringido por política de la editorial
    We introduce a community detection algorithm (Fluid Communities) based on the idea of fluids interacting in an environment, expanding and contracting as a result of that interaction. Fluid Communities is based on the ...
  • Optimization of instruction fetch for decision support workloads 

    Ramírez Bellido, Alejandro; Larriba Pey, Josep; Navarro García, Carlos; Serrano, Xavier; Valero Cortés, Mateo; Torrellas, Josep (Institute of Electrical and Electronics Engineers (IEEE), 1999)
    Texto en actas de congreso
    Acceso abierto
    Instruction fetch bandwidth is feared to be a major limiting factor to the performance of future wide-issue aggressive superscalars. In this paper, we focus on database applications running decision support workloads. We ...
  • A low-complexity, high-performance fetch unit for simultaneous multithreading processors 

    Falcón Samper, Ayose Jesús; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2004)
    Texto en actas de congreso
    Acceso abierto
    Simultaneous multithreading (SMT) is an architectural technique that allows for the parallel execution of several threads simultaneously. Fetch performance has been identified as the most important bottleneck for SMT ...
  • A content aware integer register file organization 

    González García, Rubén; Cristal Kestelman, Adrián; Ortega Fernández, Daniel; Veidenbaum, Alex; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2004)
    Texto en actas de congreso
    Acceso abierto
    A register file is a critical component of a modern superscalar processor. It has a large number of entries and read/write ports in order to enable high levels of instruction parallelism. As a result, the register file's ...
  • On the scalability of 1- and 2-dimensional SIMD extensions for multimedia applications 

    Sánchez Castaño, Friman; Álvarez Mesa, Mauricio; Salamí San Juan, Esther; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2005)
    Texto en actas de congreso
    Acceso abierto
    SIMD extensions are the most common technique used in current processors for multimedia computing. In order to obtain more performance for emerging applications SIMD extensions need to be scaled. In this paper we perform ...

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