Enviaments recents

  • Structural methods for the synthesis of speed-independent circuits 

    Pastor Llorens, Enric; Cortadella, Jordi; Kondratyev, Alex; Roig Mansilla, Oriol (Institute of Electrical and Electronics Engineers (IEEE), 1996)
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    Most existing tools for the synthesis of asynchronous circuits from Signal Transition Graphs (STGs) derive the reachability graph for the calculation of logic equations. This paper presents novel methods exclusively based ...
  • RESIS: A new methodology for register optimization in software pipelining 

    Sánchez Carracedo, Fermín; Cortadella, Jordi (Springer, 1996)
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    Accés obert
    This paper presents a new technique to reduce the register pressure in pipelined schedules. A two-step approach is proposed: minimizing the SPAN of the loop and rearranging operations within a basic block. Experimental ...
  • Cross-modal embeddings for video and audio retrieval 

    Surís Coll-Vinent, Dídac; Duarte, Amanda; Salvador Aguilera, Amaia; Torres Viñals, Jordi; Giró Nieto, Xavier (Springer, 2019)
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    In this work, we explore the multi-modal information provided by the Youtube-8M dataset by projecting the audio and visual features into a common feature space, to obtain joint audio-visual embeddings. These links are used ...
  • Checking signal transition graph implementability by symbolic bdd traversal 

    Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Pastor Llorens, Enric; Roig Mansilla, Oriol; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1995)
    Text en actes de congrés
    Accés obert
    This paper defines conditions for a Signal Transition Graph to be implemented by an asynchronous circuit. A hierarchy of the implementability classes is presented. Our main concern is the implementability of the specification ...
  • A new look at the conditions for the synthesis of speed-independent circuits 

    Pastor Llorens, Enric; Cortadella, Jordi; Roig Mansilla, Oriol (Institute of Electrical and Electronics Engineers (IEEE), 1995)
    Text en actes de congrés
    Accés obert
    This paper presents a set of sufficient conditions for the gate-level synthesis of speed-independent circuits when constrained to a given class of gate library. Existing synthesis methodologies are restricted to architectures ...
  • Hierarchical gate-level verification of speed-independent circuits 

    Roig Mansilla, Oriol; Cortadella, Jordi; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 1995)
    Text en actes de congrés
    Accés obert
    This paper presents a method for the verification of speed-independent circuits. The main contribution is the reduction of the circuit to a set of complex gates that makes the verification time complexity depend only on ...
  • High-level synthesis of asynchronous systems: Scheduling and process synchronization 

    Badia Sala, Rosa Maria; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1993)
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    Accés obert
    Basic concepts for scheduling algorithms and control synthesis in high-level synthesis of asynchronous circuits are defined. Two scheduling strategies are presented and evaluated. Experiments on different benchmarks show ...
  • An asynchronous architecture model for behavioral synthesis 

    Cortadella, Jordi; Badia Sala, Rosa Maria (Institute of Electrical and Electronics Engineers (IEEE), 1993)
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    An asynchronous architecture model for behavioral synthesis is presented. The basis of the model lies in a distributed control structure consisting of multiple communicating processes. Data processing is performed by ...
  • Accelerating K-mer Frequency Counting with GPU and Non-Volatile Memory 

    Cadenelli, Nicola; Polo Cantero, José; Carrera Pérez, David (2018)
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    The emergence of Next Generation Sequencing (NGS) platforms has increased the throughput of genomic sequencing and in turn the amount of data that needs to be processed, requiring highly efficient computation for its ...
  • MPI+OpenMP tasking scalability for the simulation of the human brain 

    Valero-Lara, Pedro; Sirvent, Raul; Pena, A. J.; Martorell Bofill, Xavier; Labarta Mancho, Jesús José (Association for Computing Machinery (ACM), 2018)
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    Accés restringit per política de l'editorial
    The simulation of the behavior of the Human Brain is one of the most ambitious challenges today with a non-end of important applications. We can find many different initiatives in the USA, Europe and Japan which attempt ...
  • Next stop 'NoOps': enabling cross-system diagnostics through graph-based composition of logs and metrics 

    Zasadzinski, Michal; Solé Simó, Marc; Brandon, Alvaro; Muntés Mulero, Victor; Carrera Pérez, David (Institute of Electrical and Electronics Engineers (IEEE), 2018)
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    Performing diagnostics in IT systems is an increasingly complicated task, and it is not doable in satisfactory time by even the most skillful operators. Systems and their architecture change very rapidly in response to ...
  • GekkoFS: A temporary distributed file system for HPC applications 

    Vef, Marc-André; Moti, Nafiseh; Süb, Tim; Tocci, Tommaso; Nou, Ramon; Miranda, Alberto; Cortés, Toni; Brinkmann, Andre (Institute of Electrical and Electronics Engineers (IEEE), 2018)
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    We present GekkoFS, a temporary, highly-scalable burst buffer file system which has been specifically optimized for new access patterns of data-intensive High-Performance Computing (HPC) applications. The file system ...

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