Recent Submissions

  • A case study for the verification of complex timed circuits: IPCMOS 

    Peña Basurto, Marco Antonio; Cortadella, Jordi; Pastor Llorens, Enric; Smirnov, Alexandre (Institute of Electrical and Electronics Engineers (IEEE), 2002)
    Conference report
    Open Access
    The verification of a n-stage pulse-driven IPCMOS pipeline, for any n>0, is presented. The complexity of the system is 32n transistors and delay information is provided at the level of transistor The correctness of the ...
  • Formal verification of safety properties in timed circuits 

    Peña Basurto, Marco Antonio; Cortadella, Jordi; Kondratyev, Alex; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 2000)
    Conference report
    Open Access
    The incorporation of timing makes circuit verification computationally expensive. This paper proposes a new approach for the verification of timed circuits. Rather than calculating the exact timed stare space, a conservative ...
  • Structural methods to improve the symbolic analysis of Petri nets 

    Pastor Llorens, Enric; Cortadella, Jordi; Peña Basurto, Marco Antonio (Springer, 1999)
    Conference report
    Open Access
    Symbolic techniques based on BDDs (Binary Decision Diagrams) have emerged as an efficient strategy for the analysis of Petri nets. The existing techniques for the symbolic encoding of each marking use a fixed set of variables ...
  • Synthesis of speed-independent circuits from STG-unfolding segment 

    Semenov, Alex; Yakovlev, Alex; Pastor Llorens, Enric; Peña Basurto, Marco Antonio; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1997)
    Conference report
    Open Access
    This paper presents a novel technique for synthesis of speed-independent circuits. It is based on partial order representation of the state graph called STG-unfolding segment. The new method uses approximation technique ...
  • Automatic generation of synchronous test patterns for asynchronous circuits 

    Roig Mansilla, Oriol; Cortadella, Jordi; Peña Basurto, Marco Antonio; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 1997)
    Conference report
    Open Access
    This paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exercised by applying synchronous test vectors, ...
  • Decomposition and technology mapping of speed-independent circuits using Boolean relations 

    Cortadella, Jordi; Kishinevsky, Michael; Kondratyev, Alex; Lavagno, Luciano; Pastor Llorens, Enric; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1997)
    Conference report
    Open Access
    Presents a new technique for the decomposition and technology mapping of speed-independent circuits. An initial circuit implementation is obtained in the form of a netlist of complex gates, which may not be available in ...
  • Efficient encoding schemes for symbolic analysis of Petri nets 

    Pastor Llorens, Enric; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1998)
    Conference report
    Open Access
    Petri nets are a graph-based formalism appropriate to model concurrent systems such as asynchronous circuits or network protocols. Symbolic techniques based on Binary Decision Diagrams (BDDs) have emerged as one of the ...
  • A mathematical formulation of the loop pipelining problem 

    Cortadella, Jordi; Badia Sala, Rosa Maria; Sánchez Carracedo, Fermín (Universitat Politècnica de Catalunya (UPC), 1996)
    Conference report
    Open Access
    This paper presents a mathematical model for the loop pipelining problem that considers several parameters for optimization and supports any combination of resource and timing constraints. The unrolling degree of the loop ...
  • Partial order based approach to synthesis of speed-independent circuits 

    Semenov, Alex; Yakovlev, Alex; Pastor Llorens, Enric; Peña Basurto, Marco Antonio; Cortadella, Jordi; Lavagno, Luciano (Institute of Electrical and Electronics Engineers (IEEE), 1997)
    Conference report
    Open Access
    This paper introduces a novel technique for synthesis of speed-independent circuits from their Signal Transition Graph specifications. The new method uses partial order in the form of the STG-unfolding segment to derive ...
  • Structural methods for the synthesis of speed-independent circuits 

    Pastor Llorens, Enric; Cortadella, Jordi; Kondratyev, Alex; Roig Mansilla, Oriol (Institute of Electrical and Electronics Engineers (IEEE), 1996)
    Conference report
    Open Access
    Most existing tools for the synthesis of asynchronous circuits from Signal Transition Graphs (STGs) derive the reachability graph for the calculation of logic equations. This paper presents novel methods exclusively based ...
  • RESIS: A new methodology for register optimization in software pipelining 

    Sánchez Carracedo, Fermín; Cortadella, Jordi (Springer, 1996)
    Conference report
    Open Access
    This paper presents a new technique to reduce the register pressure in pipelined schedules. A two-step approach is proposed: minimizing the SPAN of the loop and rearranging operations within a basic block. Experimental ...
  • Cross-modal embeddings for video and audio retrieval 

    Surís Coll-Vinent, Dídac; Duarte, Amanda; Salvador Aguilera, Amaia; Torres Viñals, Jordi; Giró Nieto, Xavier (Springer, 2019)
    Conference report
    Open Access
    In this work, we explore the multi-modal information provided by the Youtube-8M dataset by projecting the audio and visual features into a common feature space, to obtain joint audio-visual embeddings. These links are used ...

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