Enviaments recents

  • Architectural support for task dependence management with flexible software scheduling 

    Castillo, Emilio; Álvarez, Lluc; Moreto Planas, Miquel; Casas, Marc; Vallejo, Enrique; Bosque, Jose L.; Beivide Palacio, Ramon; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2018)
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    The growing complexity of multi-core architectures has motivated a wide range of software mechanisms to improve the orchestration of parallel executions. Task parallelism has become a very attractive approach thanks to its ...
  • Improving OpenStack Swift interaction with the I/O stack to enable software defined storage 

    Nou, Ramon; Miranda, Alberto; Siquier, Marc; Cortés, Toni (Institute of Electrical and Electronics Engineers (IEEE), 2018)
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    This paper analyses how OpenStack Swift, a distributed object storage service for a globally used middleware, interacts with the I/O subsystem through the Operating System. This interaction, which seems organised and clean ...
  • Efficient exception handling support for GPUs 

    Tanasic, Ivan; Gelado Fernandez, Isaac; Jorda, Marc; Ayguadé Parra, Eduard; Navarro, Nacho (Association for Computing Machinery (ACM), 2017)
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    Operating systems have long relied on the exception handling mechanism to implement numerous virtual memory features and optimizations. However, today's GPUs have a limited support for exceptions, which prevents implementation ...
  • Extending OmpSs for OpenCL kernel co-execution in heterogeneous systems 

    Pérez, Borja; Stafford, Esteban; Bosque, Jose L.; Beivide Palacio, Ramon; Mateo, Sergi; Teruel, Xavier; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2017)
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    Heterogeneous systems have a very high potential performance but present difficulties in their programming. OmpSs is a well known framework for task based parallel applications, which is an interesting tool to simplify the ...
  • Gestión de contenidos en caches operando a bajo voltaje 

    Ferrerón, Alexandra; Alastruey, Jesús; Suárez Gracía, Dario; Monreal Arnal, Teresa; Ibáñez Marín, Pablo Enrique; Viñals Yúfera, Víctor (2016)
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    La eficiencia energética de las caches en chip puede mejorarse reduciendo su voltaje de alimentación (Vdd ). Sin embargo, este escalado de Vdd está limitado a una tensión Vddmin por debajo de la cual algunas celdas SRAM ...
  • Selección de contenidos basada en reuso para caches compartidas en exclusión 

    Díaz Maag, Javier; Monreal Arnal, Teresa; Viñals Yúfera, Víctor; Ibáñez Marín, Pablo Enrique; Llaberia Griño, José María (2015)
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    Publicaciones previas revelan que el flujo de referencias que llega a la cache compartida (SLLC) de un chip multiprocesador muestra poca localidad temporal. Sin embargo, muestra localidad de reuso, es decir, los bloques ...
  • A comparison of cache hierarchies for SMT processors 

    Suárez Gracía, Dario; Monreal Arnal, Teresa; Viñals Yúfera, Víctor (Universidad de La Laguna. Servicio de Publicaciones, 2011)
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    In the multithread and multicore era, programs are forced to share part of the processor structures. On one hand, the state of the art in multithreading describes how efficiently manage and distribute inner resources such ...
  • An adaptive controller to save dynamic energy in LP-NUCA 

    Suárez Gracía, Dario; Monreal Arnal, Teresa; Viñals Yúfera, Víctor (Universidad de La Laguna. Servicio de Publicaciones, 2011)
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    Portable devices often demand powerful processors to run computing intensive applications, such as video playing or gaming, and ultra low en-ergy consumption to extend device uptime. Such con-flicting requirements are hard ...
  • Oblivious routing schemes in extended generalized fat tree networks 

    Rodríguez Herrera, Germán; Minkenberg, Cyriel; Beivide Palacio, Ramon; Luijten, Ronald P.; Labarta Mancho, Jesús José; Valero Cortés, Mateo (IEEE Computational Intelligence Society, 2009)
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    A family of oblivious routing schemes for fat trees and their slimmed versions is presented in this work. First, two popular oblivious routing algorithms, which we refer to as S-mod-k and D-mod-k, are analyzed in detail. ...
  • Selección del tamaño del banco de registros y de la política de asignación de recursos en procesadores SMT 

    Alastruey, Jesús; Monreal Arnal, Teresa; Cazorla Almeida, Francisco Javier; Viñals Yúfera, Víctor; Valero Cortés, Mateo (Thomson Editores Spain, 2007)
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    Este trabajo estudia el impacto del tamaño del banco de registros físico (BRF) en el rendimiento de procesadores Simultaneous Multithreading (SMT). Como es bien conocido, el BRF es un componente crítico en este tipo de ...
  • ReD: A policy based on reuse detection for demanding block selection in last-level Caches 

    Díaz Maag, Javier; Ibáñez Marín, Pablo Enrique; Monreal Arnal, Teresa; Viñals Yúfera, Víctor; Llaberia Griñó, José M. (2017)
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    In this paper, we propose a new block selection policy for Last-Level Caches (LLCs) that decides, based on Reuse Detection, whether a block coming from main memory is inserted, or not, in the LLC. The proposed policy, ...
  • Fluid communities: a competitive, scalable and diverse community detection algorithm 

    Pares, Ferran; García Gasulla, Darío; Vilalta, Armand; Moreno, Jonatan; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Cortés, Ulises; Suzumura, Toyotaro (Springer, 2017)
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    We introduce a community detection algorithm (Fluid Communities) based on the idea of fluids interacting in an environment, expanding and contracting as a result of that interaction. Fluid Communities is based on the ...

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