CAP - Grup de Computació d'Altes Prestacions
En aquest grup s´investiga en tècniques que permeten millorar l´eficiència dels sistemes de computació d?altes prestacions. Aquest objectiu es tracta des de perspectives diverses que requereixen un cert grau de cooperació: arquitectura del sistema uniprocessador i multiprocessador, compilador, sistema operatiu, eines d´anàlisi, visualització i predicció, algorismes i aplicacions. Per mesurar l´eficiència es consideren mètriques que van més enllà del temps d´execució dels programes. En particular es consideren aspectes relacionats amb el disseny del sistema (cicle d´operació, àrea i consum de potència del processador i la jerarquia de memòria, escalabilitat de l´organització uniprocessador i multiprocessador), amb la verificació funcional dels sistemes, amb la facilitat i la portabilitat del model de programació i amb el rendiment en entorns multiprogramats i distribuïts, entre altres.
The group aims to improve the efficiency of high-performance computing systems. To that end, it employs a variety of approaches that require a certain level of cooperation and integration: microarchitecture and multiprocessor architecture, compilers, operating systems, analysis, visualisation and prediction tools, algorithms and applications. When measuring efficiency, in addition to the traditional approach that takes the execution time into account, we use metrics that consider design factors such as cycle time, area and power dissipation of the processor and memory hierarchy, scalability of the microarchitecture and multiprocessor organisation, system correctness, portability and ease of use of programming models, and performance when running on multiuser, multiprogrammed and distributed environments, among others.
The group aims to improve the efficiency of high-performance computing systems. To that end, it employs a variety of approaches that require a certain level of cooperation and integration: microarchitecture and multiprocessor architecture, compilers, operating systems, analysis, visualisation and prediction tools, algorithms and applications. When measuring efficiency, in addition to the traditional approach that takes the execution time into account, we use metrics that consider design factors such as cycle time, area and power dissipation of the processor and memory hierarchy, scalability of the microarchitecture and multiprocessor organisation, system correctness, portability and ease of use of programming models, and performance when running on multiuser, multiprogrammed and distributed environments, among others.
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Articles de revista [331]
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Recent Submissions
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Enabling system wide shared memory for performance improvement in PyCOMPSs applications
(Institute of Electrical and Electronics Engineers (IEEE), 2020)
Conference report
Open AccessPython has been gaining some traction for years in the world of scientific applications. However, the high-level abstraction it provides may not allow the developer to use the machines to their peak performance. To address ... -
PH-RLS: A parallel hybrid recursive least square algorithm for self-mixing interferometric laser sensor
(2021-03-17)
Article
Open AccessThe authors present the parallel-hybrid recursive least square (PH-RLS) algorithm for an accurate self-mixing interferometric laser vibration sensor coupled with an accelerometer under industrial conditions. Previously, ... -
DRMaestro: orchestrating disaggregated resources on virtualized data-centers
(Springer, 2021-03-06)
Article
Open AccessModern applications demand resources at an unprecedented level. In this sense, data-centers are required to scale efficiently to cope with such demand. Resource disaggregation has the potential to improve resource-efficiency ... -
Cost-aware prediction of uncorrected DRAM errors in the field
(Institute of Electrical and Electronics Engineers (IEEE), 2020)
Conference report
Open AccessThis paper presents and evaluates a method to predict DRAM uncorrected errors, a leading cause of hardware failures in large-scale HPC clusters. The method uses a random forest classifier, which was trained and evaluated ... -
Improving predication efficiency through compaction/restoration of SIMD instructions
(Institute of Electrical and Electronics Engineers (IEEE), 2020)
Conference report
Open AccessVector processors offer a wide range of unexplored opportunities to improve performance and energy efficiency. However, despite its potential, vector code generation and execution have significant challenges, the most ... -
Implementation of a high-accuracy phase unwrapping algorithm using parallel-hybrid programming approach for displacement sensing using self-mixing interferometry
(2021-02-08)
Article
Restricted access - publisher's policyPhase unwrapping is an integral part of multiple algorithms with diverse applications. Detailed phase unwrapping is also necessary for achieving high-accuracy metric sensing using laser feedback-based self-mixing interferometry ... -
Accelerated execution via eager-release of dependencies in task-based workflows
(Sage, 2021-03-03)
Article
Open AccessTask-based programming models offer a flexible way to express the unstructured parallelism patterns of nowadays complex applications. This expressive capability is required to achieve maximum possible performance for ... -
Thermal infrared video stabilization for aerial monitoring of active wildfires
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Article
Restricted access - publisher's policyMeasuring wildland fire behaviour is essential forfire science and fire management. Aerial thermal infrared (TIR)imaging provides outstanding opportunities to acquire suchinformation remotely. Variables ... -
Parallelware tools: an experimental evaluation on POWER systems
(Springer, 2019)
Conference report
Open AccessStatic code analysis tools are designed to aid software developers to build better quality software in less time, by detecting defects early in the software development life cycle. Even the most experienced developer ... -
Runtime-guided ECC protection using online estimation of memory vulnerability
(Institute of Electrical and Electronics Engineers (IEEE), 2020)
Conference report
Open AccessDiminishing reliability of semiconductor technologies and decreasing power budgets per component hinder designing next-generation high performance computing (HPC) systems. Both constraints strongly impact memory subsystems, ... -
DDF Library: Enabling functional programming in a task-based model
(Elsevier, 2021-05)
Article
Restricted access - publisher's policyIn recent years, the areas of High-Performance Computing (HPC) and massive data processing (also know as Big Data) have been in a convergence course, since they tend to be deployed on similar hardware. HPC systems have ... -
You only run once: Spark auto-tuning from a single run
(2020-12)
Article
Open AccessTuning configurations of Spark jobs is not a trivial task. State-of-the-art auto-tuning systems are based on iteratively running workloads with different configurations. During the optimization process, the relevant features ...
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