CAP - Grup de Computació d'Altes Prestacions
En aquest grup s´investiga en tècniques que permeten millorar l´eficiència dels sistemes de computació d?altes prestacions. Aquest objectiu es tracta des de perspectives diverses que requereixen un cert grau de cooperació: arquitectura del sistema uniprocessador i multiprocessador, compilador, sistema operatiu, eines d´anàlisi, visualització i predicció, algorismes i aplicacions. Per mesurar l´eficiència es consideren mètriques que van més enllà del temps d´execució dels programes. En particular es consideren aspectes relacionats amb el disseny del sistema (cicle d´operació, àrea i consum de potència del processador i la jerarquia de memòria, escalabilitat de l´organització uniprocessador i multiprocessador), amb la verificació funcional dels sistemes, amb la facilitat i la portabilitat del model de programació i amb el rendiment en entorns multiprogramats i distribuïts, entre altres.
The group aims to improve the efficiency of high-performance computing systems. To that end, it employs a variety of approaches that require a certain level of cooperation and integration: microarchitecture and multiprocessor architecture, compilers, operating systems, analysis, visualisation and prediction tools, algorithms and applications. When measuring efficiency, in addition to the traditional approach that takes the execution time into account, we use metrics that consider design factors such as cycle time, area and power dissipation of the processor and memory hierarchy, scalability of the microarchitecture and multiprocessor organisation, system correctness, portability and ease of use of programming models, and performance when running on multiuser, multiprogrammed and distributed environments, among others.
The group aims to improve the efficiency of high-performance computing systems. To that end, it employs a variety of approaches that require a certain level of cooperation and integration: microarchitecture and multiprocessor architecture, compilers, operating systems, analysis, visualisation and prediction tools, algorithms and applications. When measuring efficiency, in addition to the traditional approach that takes the execution time into account, we use metrics that consider design factors such as cycle time, area and power dissipation of the processor and memory hierarchy, scalability of the microarchitecture and multiprocessor organisation, system correctness, portability and ease of use of programming models, and performance when running on multiuser, multiprogrammed and distributed environments, among others.
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Storage-heterogeneity aware task-based programming models to optimize I/O intensive applications
(2022-03-22)
Article
Open AccessTask-based programming models have enabled the optimized execution of the computation workloads of applications. These programming models can take advantage of large-scale distributed infrastructures by allowing the parallel ... -
Automated generation of high-performance computational fluid dynamics codes
(Elsevier, 2022-05)
Article
Restricted access - publisher's policyDomain-Specific Languages (DSLs) improve programmers productivity by decoupling problem descriptions from algorithmic implementations. However, DSLs for High-Performance Computing (HPC) have two additional critical ... -
A new strategy for multitarget drug discovery/repositioning through the identification of similar 3D amino acid patterns among proteins structures: The case of Tafluprost and its efects on cardiac ion channels
(Frontiers Media SA, 2022-03-18)
Article
Open AccessThe identification of similar three-dimensional (3D) amino acid patterns among different proteins might be helpful to explain the polypharmacological profile of many currently used drugs. Also, it would be a reasonable ... -
Asymmetric HMMs for online ball-bearing health assessments
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Article
Open AccessThe degradation of critical components inside large industrial assets, such as ball-bearings, has a negative impact on production facilities, reducing the availability of assets due to an unexpectedly high failure rate. ... -
Adaptive power shifting for power-constrained heterogeneous systems
(Institute of Electrical and Electronics Engineers (IEEE), 2022-05-12)
Article
Open AccessThe number and heterogeneity of compute devices, even within a single compute node, has been steadily on the rise. Since all systems must operate under a power cap, the number of discrete devices that can run simultaneously ... -
DO-178C certification of general-purpose GPU software: review of existing methods and future directions
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open Access—General-Purpose GPU software is considered for use in avionics to satisfy the increased computational requirements of future systems. Therefore, it needs to be certified following the DO-178C guidance as all airborne ... -
An FPGA accelerator of the wavefront algorithm for genomics pairwise alignment
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessIn the last years, advances in next-generation sequencing technologies have enabled the proliferation of genomic applications that guide personalized medicine. These applications have an enormous computational cost due to ... -
Explicit uncore frequency scaling for energy optimisation policies with EAR in Intel architectures
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessEAR is an energy management framework which offers three main services: energy accounting, energy control and energy optimisation. The latter is done through the EAR runtime library (EARL). EARL is a dynamic, transparent, ... -
OpenCL-based FPGA accelerator for semi-global approximate string matching using diagonal bit-vectors
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessAn FPGA accelerator for the computation of the semi-global Levenshtein distance between a pattern and a reference text is presented. The accelerator provides an important benefit to reduce the execution time of read-mappers ... -
Particle-in-cell simulation using asynchronous tasking
(Springer Nature, 2021)
Conference report
Open AccessRecently, task-based programming models have emerged as a prominent alternative among shared-memory parallel programming paradigms. Inherently asynchronous, these models provide native support for dynamic load balancing ... -
Dynamically adapting floating-point precision to accelerate deep neural network training
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessMixed-precision (MP) arithmetic combining both single- and half-precision operands has been successfully applied to train deep neural networks. Despite its advantages in terms of reducing the need for key resources like ... -
Multilevel simulation-based co-design of next generation HPC microprocessors
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Conference report
Open AccessThis paper demonstrates the combined use of three simulation tools in support of a co-design methodology for an HPC-focused System-on-a-Chip (SoC) design. The simulation tools make different trade-offs between simulation ...
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