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CGPA: Coarse-Grained Pruning of Activations for Energy-Efficient RNN Inference
(2019-09-01)
Article
Open AccessRecurrent neural networks (RNNs) perform element-wise multiplications across the activations of gates. We show that a significant percentage of activations are saturated and propose coarse-grained pruning of activations ... -
2018 International Symposium on Computer Architecture influential paper award
(2018-07-01)
Article
Open AccessThe International Symposium on Computer Architecture (ISCA) recognizes every year the most influential paper published in this conference 15 years earlier, based on its impact on research, development, products or ideas. ... -
Performance analysis and optimization of automatic speech recognition
(2018-10-01)
Article
Open AccessFast and accurate Automatic Speech Recognition (ASR) is emerging as a key application for mobile devices. Delivering ASR on such devices is challenging due to the compute-intensive nature of the problem and the power ... -
SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
(Institute of Electrical and Electronics Engineers (IEEE), 2018-01-01)
Article
Open AccessCross-layer reliability is becoming the preferred solution when reliability is a concern in the design of a microprocessor-based system. Nevertheless, deciding how to distribute the error management across the different ... -
Visibility rendering order: Improving energy efficiency on mobile GPUs through frame coherence
(2019-02-01)
Article
Open AccessDuring real-time graphics rendering, objects are processed by the GPU in the order they are submitted by the CPU, and occluded surfaces are often processed even though they will end up not being part of the final image, ... -
Strategies to enhance the 3T1D-DRAM cell variability robustness beyond 22 nm
(2014-10-01)
Article
Open Access3T1D cell has been stated as a valid alternative to be implemented on L1 memory cache to substitute 6T, highly affected by device variability as technology dimensions are reduced. In this work, we have shown that 22 nm ... -
Low-power automatic speech recognition through a mobile GPU and a Viterbi accelerator
(2017-04-12)
Article
Open AccessAutomatic speech recognition (ASR) has become a core technology for mobile devices. Delivering real-time and accurate ASR has a huge computational cost, which is challenging to achieve in tightly energy-constrained platforms ... -
Statistical analysis and comparison of 2T and 3T1D e-DRAM minimum energy operation
(2017-03-01)
Article
Open AccessBio-medical wearable devices restricted to their small-capacity embedded-battery require energy-efficiency of the highest order. However, minimum-energy point (MEP) at sub-threshold voltages is unattainable with SRAM memory, ... -
Executing algorithms with hypercube topology on torus multicomputers
(1995-08)
Article
Open AccessMany parallel algorithms use hypercubes as the communication topology among their processes. When such algorithms are executed on hypercube multicomputers the communication cost is kept minimum since processes can be ... -
Exploiting narrow values for soft error tolerance
(2006-07)
Article
Open AccessSoft errors are an important challenge in contemporary microprocessors. Particle hits on the components of a processor are expected to create an increasing number of transient errors with each new microprocessor generation. ... -
Reliability: fallacy or reality?
(2007-11)
Article
Open AccessAs chip architects and manufacturers plumb ever-smaller process technologies, new species of faults are compromising device reliability, following an introduction by the authors debate whether reliability is a legitimate ... -
Thread partitioning and value prediction for exploiting speculative thread-level parallelism
(2004-02)
Article
Open AccessSpeculative thread-level parallelism has been recently proposed as a source of parallelism to improve the performance in applications where parallel threads are hard to find. However, the efficiency of this execution model ...
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