ARCO - Microarquitectura i Compiladors: Enviaments recents
Ara es mostren els items 1-12 de 273
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DNA-TEQ: an adaptive exponential quantization of tensors for DNN inference
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Text en actes de congrés
Accés obertQuantization is commonly used in Deep Neural Networks (DNNs) to reduce the storage and computational complexity by decreasing the arithmetical precision of activations and weights, a.k.a. tensors. Efficient hardware ... -
Boosting point cloud search with a vector unit
(2023)
Report de recerca
Accés obertModern robots collect and process point clouds to perform accurate registration and segmentation. The most time-consuming kernel within point cloud processing -namely neighbor search- relies on appropriate data structures, ... -
Analyzing and improving hardware modeling of Accel-Sim
(2023-10)
Report de recerca
Accés obertGPU architectures have become popular for executing generalpurpose programs. Their many-core architecture supports a large number of threads that run concurrently to hide the latency among dependent instructions. In modern ... -
δLTA:: Decoupling camera sampling from processing to avoid redundant computations in the vision pipeline
(Association for Computing Machinery (ACM), 2023)
Text en actes de congrés
Accés obertContinuous Vision (CV) systems are essential for emerging applications like Autonomous Driving (AD) and Augmented/Virtual Reality (AR/VR). A standard CV System-on-a-Chip (SoC) pipeline includes a frontend for image capture ... -
SLIDEX: Sliding window extension for image processing
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Text en actes de congrés
Accés obertWith the rising need for efficient image processing in emerging applications such as Autonomous Driving (AD) and Augmented/Virtual Reality (AR/VR), many existing solutions do not meet their performance and energy efficiency ... -
QeiHaN: An energy-efficient DNN accelerator that leverages log quantization in NDP architectures
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Comunicació de congrés
Accés obertThe constant growth of DNNs makes them challenging to implement and run efficiently on traditional computecentric architectures. Some works have attempted to enhance accelerators by adding more compute units and on-chip ... -
Boustrophedonic frames: Quasi-optimal L2 caching for textures in GPUs
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Text en actes de congrés
Accés obertLiterature is plentiful in works exploiting cache locality for GPUs. A majority of them explore replacement or bypassing policies. In this paper, however, we surpass this exploration by fabricating a formal proof for a ... -
Exploiting kernel compression on BNNs
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Text en actes de congrés
Accés obertBinary Neural Networks (BNNs) are showing tremen-dous success on realistic image classification tasks. Notably, their accuracy is similar to the state-of-the-art accuracy obtained by full-precision models tailored to edge ... -
K-D Bonsai: ISA-extensions to compress K-D trees for autonomous driving tasks
(Association for Computing Machinery (ACM), 2023)
Text en actes de congrés
Accés obertAutonomous Driving (AD) systems extensively manipulate 3D point clouds for object detection and vehicle localization. Thereby, efficient processing of 3D point clouds is crucial in these systems. In this work we propose ... -
Lightweight register file caching in collector units for GPUs
(Association for Computing Machinery (ACM), 2023)
Text en actes de congrés
Accés obertModern GPUs benefit from a sizable Register File (RF) to provide fine-grained thread switching. As the RF is huge and accessed frequently, it consumes a considerable share of the dynamic energy of the GPU. Designing a ... -
Simple out of order core for GPGPUs
(Association for Computing Machinery (ACM), 2023)
Text en actes de congrés
Accés obertGPU architectures have become popular for executing general-purpose programs which rely on having a large number of threads that run concurrently to hide the latency among dependent instructions. This approach has an ... -
SHARP: An adaptable, energy-efficient accelerator for recurrent neural networks
(Association for Computing Machinery (ACM), 2023-01-24)
Article
Accés obertThe effectiveness of Recurrent Neural Networks (RNNs) for tasks such as Automatic Speech Recognition has fostered interest in RNN inference acceleration. Due to the recurrent nature and data dependencies of RNN computations, ...