Topic 7: parallel computer architecture and instruction level parallelism
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We welcome you to the two Parallel Computer Architecture and Instruction Level Parallelism sessions of Euro-Par 2006 conference being held in Dresden, Germany. The call for papers for this Euro-Par topic area sought papers on all hardware/software aspects of parallel computer architecture, processor architecture and microarchitecture. This year 12 papers were submitted to this topic area. Among the submissions, 5 papers were accepted as full papers for the conference (41% acceptance rate).
CitationAyguade, E. [et al.]. Topic 7: parallel computer architecture and instruction level parallelism. "Lecture notes in computer science", Setembre 2006, vol. 1, núm. 4128, p. 459.
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