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dc.contributor.authorBalart, J
dc.contributor.authorGonzález Tallada, Marc
dc.contributor.authorMartorell Bofill, Xavier
dc.contributor.authorAyguadé Parra, Eduard
dc.contributor.authorSura, Z
dc.contributor.authorChen, T
dc.contributor.authorZhang, T
dc.contributor.authorO'Brien, Kevin
dc.contributor.authorO'Brien, Kathryn
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.identifier.citationBalart, J. [et al.]. A novel asynchronous software cache implementation for the Cell-BE processor. "Lecture notes in computer science", Octubre 2008, vol. 5234, núm. 1, p. 125-140.
dc.description.abstractThis paper describes the implementation of a runtime library for asynchronous communication in the Cell BE processor. The runtime library implementation provides with several services that allow the compiler to generate code, maximizing the chances for overlapping communication and computation. The library implementation is organized as a Software Cache and the main services correspond to mechanisms for data look up, data placement and replacement, data write back, memory synchronization and address translation. The implementation guarantees that all those services can be totally uncoupled when dealing with memory references. Therefore this provides opportunities to the compiler to organize the generated code in order to overlap as much as possible computation with communication. The paper also describes the necessary mechanism to overlap the communication related to write back operations with actual computation. The paper includes the description of the compiler basic algorithms and optimizations for code generation. The system is evaluated measuring bandwidth and global updates ratios, with two benchmarks from the HPCC benchmark suite: Stream and Random Access.
dc.format.extent16 p.
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
dc.subjectÀrees temàtiques de la UPC::Informàtica
dc.subject.lcshParallel programming (Computer science)
dc.subject.lcshMicroprocessors -- Programming
dc.titleA novel asynchronous software cache implementation for the Cell-BE processor
dc.subject.lemacProgramació en paral·lel (Informàtica)
dc.subject.lemacMicroprocessadors -- Programació
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.description.peerreviewedPeer Reviewed
dc.rights.accessRestricted access - publisher's policy
dc.description.versionPostprint (published version)
local.citation.authorBalart, J.; Gonzalez, M.; Martorell, X.; Ayguade, E.; Sura, Z.; Chen, T.; Zhang, T.; O'Brien, K.; O'Brien, K.
local.citation.publicationNameLecture notes in computer science

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Attribution-NonCommercial-NoDerivs 3.0 Spain
Llevat que s'hi indiqui el contrari, els continguts d'aquesta obra estan subjectes a la llicència de Creative Commons : Reconeixement-NoComercial-SenseObraDerivada 3.0 Espanya