Design considerations for a CMOS Lab-on-Chip microheater array to facilitate the in vitro thermal stimulation of neurons
Document typeConference report
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
This paper identifies and addresses key design considerations and trade-offs in the implementation of a CMOS high-resolution microheater array for Lab-on-Chip (LOC) applications. Specifically, this is investigated in the context of facilitating the in vitro thermal stimulation of single neurons. The paper analyses the electro-thermal response (by means of COMSOL simulations) and reliability issues (such as melting and electromigration) of different microheater designs. The analysis shows that a small-area heater is more efficient in terms of power, but it has more reliability problems essentially due to electromigration effects. For the proposed heater designs, the expected lifetime is a few days (in continuous operation) in the worst scenario, which is still generally acceptable for LOC applications.
CitationReverter, F. [et al.]. Design considerations for a CMOS Lab-on-Chip microheater array to facilitate the in vitro thermal stimulation of neurons. A: IEEE International Symposium on Circuits and Systems. "2014 IEEE International Symposium on Circuits and Systems (ISCAS 2014): Melbourne, Australia: 1-5 June 2014". Melbourne: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 630-633.
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