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dc.contributor.authorAmat Bertran, Esteve
dc.contributor.authorCalomarde Palomino, Antonio
dc.contributor.authorCanal Corretger, Ramon
dc.contributor.authorRubio Sola, Jose Antonio
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria de Sistemes, Automàtica i Informàtica Industrial
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2015-03-03T17:02:22Z
dc.date.available2015-03-03T17:02:22Z
dc.date.created2014
dc.date.issued2014
dc.identifier.citationAmat, Esteve [et al.]. Variability impact on on-chip memory data paths. A: European Workshop on CMOS Variability. "5th European Workshop on CMOS Variability". 2014.
dc.identifier.urihttp://hdl.handle.net/2117/26568
dc.description.abstractProcess variations have a large impact on device and circuit reliability and performance. Few studies are focused on their impact on more complex systems, as for example their influence in a data path. In our study, the impact of variations in the memory cell block is the largest measured, as it is usually designed with the minimum device dimensions. Moreover, we observe a significant influence of the device type (p/nMOS) used to implement the memory cell in terms of delay and variability robustness.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.lcshElectronic circuits
dc.subject.otherdelay
dc.subject.otherDRAM
dc.subject.othertemperature
dc.subject.othervariability
dc.titleVariability impact on on-chip memory data paths
dc.typeConference lecture
dc.subject.lemacSistemes monoxip -- Congressos
dc.contributor.groupUniversitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
dc.contributor.groupUniversitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
dc.identifier.doi10.1109/VARI.2014.6957086
dc.description.peerreviewedPeer Reviewed
dc.rights.accessOpen Access
drac.iddocument15375167
dc.description.versionPostprint (published version)
upcommons.citation.authorAmat, Esteve; Calomarde, A.; Canal, R.; Rubio, A.
upcommons.citation.contributorEuropean Workshop on CMOS Variability
upcommons.citation.publishedtrue
upcommons.citation.publicationName5th European Workshop on CMOS Variability


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Except where otherwise noted, content on this work is licensed under a Creative Commons license: Attribution-NonCommercial-NoDerivs 3.0 Spain