Show simple item record

dc.contributor.authorArcas Abella, Oriol
dc.contributor.authorNdu, Geoffrey
dc.contributor.authorSönmez, Nehir
dc.contributor.authorGhasempour, Mohsen
dc.contributor.authorArmejach, Adrià
dc.contributor.authorNavaridas, Javier
dc.contributor.authorSong, Wei
dc.contributor.authorMawer, John
dc.contributor.authorCristal Kestelman, Adrián
dc.contributor.authorLujan, Mikel
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2015-01-19T10:01:27Z
dc.date.available2015-01-19T10:01:27Z
dc.date.created2014
dc.date.issued2014
dc.identifier.citationArcas, O. [et al.]. An empirical evaluation of High-Level Synthesis languages and tools for database acceleration. A: International Conference on Field Programmable Logic and Applications. "Conference Digest: 24th International Conference on Field Programmable Logic and Applications: Technische Universität München, Germany: September 1-5, 2014". Munich: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 1-8.
dc.identifier.isbn978-300044645-0
dc.identifier.urihttp://hdl.handle.net/2117/25882
dc.description.abstractHigh Level Synthesis (HLS) languages and tools are emerging as the most promising technique to make FPGAs more accessible to software developers. Nevertheless, picking the most suitable HLS for a certain class of algorithms depends on requirements such as area and throughput, as well as on programmer experience. In this paper, we explore the different trade-offs present when using a representative set of HLS tools in the context of Database Management Systems (DBMS) acceleration. More specifically, we conduct an empirical analysis of four representative frameworks (Bluespec SystemVerilog, Altera OpenCL, LegUp and Chisel) that we utilize to accelerate commonly-used database algorithms such as sorting, the median operator, and hash joins. Through our implementation experience and empirical results for database acceleration, we conclude that the selection of the most suitable HLS depends on a set of orthogonal characteristics, which we highlight for each HLS framework.
dc.format.extent8 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Sistemes d'informació::Bases de dades
dc.subject.lcshDatabase management
dc.subject.otherDatabase systems
dc.subject.otherField programmable gate arrays (FPGA)
dc.subject.otherDatabase algorithm
dc.subject.otherEmpirical analysis
dc.subject.otherEmpirical evaluations
dc.subject.otherHigh-level synthesis
dc.subject.otherMedian operators
dc.subject.otherProgrammer experiences
dc.subject.otherSoftware developer
dc.subject.otherSystemVerilog
dc.titleAn empirical evaluation of High-Level Synthesis languages and tools for database acceleration
dc.typeConference report
dc.subject.lemacBases de dades -- Gestió
dc.identifier.doi10.1109/FPL.2014.6927484
dc.description.peerreviewedPeer Reviewed
dc.rights.accessOpen Access
drac.iddocument15373802
dc.description.versionPostprint (author’s final draft)
upcommons.citation.authorArcas, O.; Ndu, G.; Sonmez, N.; Ghasempour, M.; Armejach, A.; Navaridas, J.; Song, W.; Mawer, J.; Cristal, A.; Lujan, M.
upcommons.citation.contributorInternational Conference on Field Programmable Logic and Applications
upcommons.citation.pubplaceMunich
upcommons.citation.publishedtrue
upcommons.citation.publicationNameConference Digest: 24th International Conference on Field Programmable Logic and Applications: Technische Universität München, Germany: September 1-5, 2014
upcommons.citation.startingPage1
upcommons.citation.endingPage8


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record

All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder