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A low area probing detector for security IC's

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hdl:2117/24973

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Weiner, Michael
Manich Bou, SalvadorMés informacióMés informacióMés informació
Sigl, Georg
Document typeConference report
Defense date2014
Rights accessRestricted access - publisher's policy
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
Abstract
In this paper, a low cost, Low Area Probing Detector (LAPD) is presented. Probing or microprobing is an attack technique against integrated circuits implementing security functions, such as OTP tokens or smartcards. It allows intercepting secrets from on-chip wires as well as injecting faults for other attacks. Microprobing is invasive as classi ed by Skorobogatov in 2005 and requires opening the microchip package as well as removing the passivation layer. While it may sound complicated and expensive, Maier and Nohl showed in 2012 that microprobing is feasible for low-budget adversaries. However, existing protection techniques against microprobing, such as active shields, redundancy of core components, or analog detection circuits containing large capacitors, are still expensive. The LAPD provides low-cost protection against microprobing. It measures minimal timing di erences between on-chip wires caused by the capacitive load of microprobes. As a novelty, it is merely based on digital components and does not require analog circuitry, which reduces the required area and process steps compared to previous approaches. Simulations show that the LAPD can detect up-to-date probes with capacitances as low as 10 fF.
CitationWeiner, M.; Manich, S.; Sigl, G. A low area probing detector for security IC's. A: Workshop on Trustworthy Manufacturing and Utilization of Secure Devices. "Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, TRUDEVICE 2014". Paderborn: 2014, p. 1-6. 
URIhttp://hdl.handle.net/2117/24973
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  • QINE - Disseny de Baix Consum, Test, Verificació i Tolerància a Fallades - Ponències/Comunicacions de congressos [60]
  • QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat - Ponències/Comunicacions de congressos [78]
  • Departament d'Enginyeria Electrònica - Ponències/Comunicacions de congressos [1.643]
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