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Scalability evaluation of a polymorphic register file: a CG case study
dc.contributor.author | Ciobanu, Catalin |
dc.contributor.author | Martorell Bofill, Xavier |
dc.contributor.author | Kuzmanov, Georgi |
dc.contributor.author | Ramírez Bellido, Alejandro |
dc.contributor.author | Gaydadjiev, Georgi |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2014-11-26T13:34:19Z |
dc.date.created | 2011 |
dc.date.issued | 2011 |
dc.identifier.citation | Ciobanu, C. [et al.]. Scalability evaluation of a polymorphic register file: a CG case study. A: International Conference on Architecture of Computing Systems. "Architecture of Computing Systems: ARCS 2011: 24th International Conference: Como, Italy: February 24-25, 2011: proceedings". Como: Springer, 2011, p. 13-25. |
dc.identifier.isbn | 978-3-642-19136-7 |
dc.identifier.uri | http://hdl.handle.net/2117/24855 |
dc.description.abstract | We evaluate the scalability of a Polymorphic Register File using the Conjugate Gradient method as a case study. We focus on a heterogeneous multi-processor architecture, taking into consideration critical parameters such as cache bandwidth and memory latency. We compare the performance of 256 Polymorphic Register File-augmented workers against a single Cell PowerPC Processor Unit (PPU). In such a scenario, simulation results suggest that for the Sparse Matrix Vector Multiplication kernel, absolute speedups of up to 200 times can be obtained. Moreover, when equal number of workers in the range 1-256 is employed, our design is between 1.7 and 4.2 times faster than a Cell PPU-based system. Furthermore, we study the memory latency and cache bandwidth impact on the sustainable speedups of the system considered. Our tests suggest that a 128 worker configuration requires the caches to deliver 1638.4 GB/sec in order to preserve 80% of its peak speedup. |
dc.format.extent | 13 p. |
dc.language.iso | eng |
dc.publisher | Springer |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Sistemes d'informació |
dc.subject.lcsh | Computer architecture |
dc.subject.lcsh | Computer systems |
dc.subject.other | Computer communication networks |
dc.subject.other | Computer system implementation |
dc.subject.other | Operating systems |
dc.subject.other | Software engineering |
dc.subject.other | Information systems applications (incl. Internet) |
dc.subject.other | Information storage and retrieval |
dc.title | Scalability evaluation of a polymorphic register file: a CG case study |
dc.type | Conference report |
dc.subject.lemac | Arquitectura d'ordinadors |
dc.subject.lemac | Sistemes informàtics |
dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.identifier.doi | 10.1007/978-3-642-19137-4_2 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://link.springer.com/chapter/10.1007%2F978-3-642-19137-4_2 |
dc.rights.access | Restricted access - publisher's policy |
local.identifier.drac | 15076288 |
dc.description.version | Postprint (published version) |
dc.relation.projectid | info:eu-repo/grantAgreement/EC/FP7/217068/EU/High Performance and Embedded Architecture and Compilation/HIPEAC |
dc.date.lift | 10000-01-01 |
local.citation.author | Ciobanu, C.; Martorell, X.; Kuzmanov, G.; Alex Ramirez; Gaydadjiev, G. |
local.citation.contributor | International Conference on Architecture of Computing Systems |
local.citation.pubplace | Como |
local.citation.publicationName | Architecture of Computing Systems: ARCS 2011: 24th International Conference: Como, Italy: February 24-25, 2011: proceedings |
local.citation.startingPage | 13 |
local.citation.endingPage | 25 |