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dc.contributor.authorPouyan, Peyman
dc.contributor.authorAmat Bertran, Esteve
dc.contributor.authorBarajas Ojeda, Enrique
dc.contributor.authorRubio Sola, Jose Antonio
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.identifier.citationPouyan, P. [et al.]. Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches. A: International Symposium on Quality Electronic Design. "Proceedings - International Symposium on Quality Electronic Design". Santa Clara: 2014, p. 32-38.
dc.description.abstractThis work presents a test and measurement technique to monitor aging and process variation status of SRAM cells as an aging-aware design technique. We have then verified our technique with an implemented chip. The obtained aging information are utilized to guide our proactive strategies, and to track the impact of aging in new reconfiguration techniques for cache memory structures. Our proactive techniques improve the reliability, extend the SRAMs lifetime, and reduce the Vmin drift in presence of process variation and BTI aging.
dc.format.extent7 p.
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.otherProcess Variation
dc.titleImpact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches
dc.typeConference report
dc.subject.lemacMemòries digitals
dc.contributor.groupUniversitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
dc.rights.accessOpen Access
dc.description.versionPostprint (author’s final draft)
upcommons.citation.authorPouyan, P.; Amat, E.; Barajas, E.; Rubio, A.
upcommons.citation.contributorInternational Symposium on Quality Electronic Design
upcommons.citation.pubplaceSanta Clara
upcommons.citation.publicationNameProceedings - International Symposium on Quality Electronic Design

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