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dc.contributor.authorServat, Harald
dc.contributor.authorLlort Sánchez, Germán
dc.contributor.authorGonzález García, Juan
dc.contributor.authorGiménez Lucas, Judit
dc.contributor.authorLabarta Mancho, Jesús José
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2014-11-19T15:07:23Z
dc.date.created2014
dc.date.issued2014
dc.identifier.citationServat, H. [et al.]. Identifying code phases using piece-wise linear regressions. A: IEEE International Parallel and Distributed Processing Symposium. "IEEE 28th International Parallel and Distributed Processing Symposium (IPDPS 2014): proceedings: Phoenix, Arizona, USA: 19-23 May 2014". Phoenix: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 941-951.
dc.identifier.isbn978-0-7695-5207-1
dc.identifier.urihttp://hdl.handle.net/2117/24763
dc.description.abstractNode-level performance is one of the factors that may limit applications from reaching the supercomputers' peak performance. Studying node-level performance and attributing it to the source code results into valuable insight that can be used to improve the application efficiency, albeit performing such a study may be an intimidating task due to the complexity and size of the applications. We present in this paper a mechanism that takes advantage of combining piece-wise linear regressions, coarse-grain sampling, and minimal instrumentation to detect performance phases in the computation regions even if their granularity is very fine. This mechanism then maps the performance of each phase into the application syntactical structure displaying a correlation between performance and source code. We introduce a methodology on top of this mechanism to describe the node-level performance of parallel applications, even for first-time seen applications. Finally, we demonstrate the methodology describing optimized in-production applications and further improving their performance applying small transformations to the code based on the hints discovered. © 2014 IEEE.
dc.format.extent11 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
dc.subject.lcshParallel programming (Computer science)
dc.subject.lcshSupercomputers
dc.subject.otherApplication tuning
dc.subject.otherInstrumentation
dc.subject.otherNode-level performance
dc.subject.otherPerformance analysis
dc.subject.otherPiece-wise linear regression
dc.subject.otherSampling
dc.titleIdentifying code phases using piece-wise linear regressions
dc.typeConference report
dc.subject.lemacProgramació en paral·lel (Informàtica)
dc.subject.lemacSupercomputadors
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/IPDPS.2014.100
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6877324
dc.rights.accessRestricted access - publisher's policy
drac.iddocument15260797
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
upcommons.citation.authorServat, H.; Llort, G.; González, J.; Gimenez, J.; Labarta, J.
upcommons.citation.contributorIEEE International Parallel and Distributed Processing Symposium
upcommons.citation.pubplacePhoenix
upcommons.citation.publishedtrue
upcommons.citation.publicationNameIEEE 28th International Parallel and Distributed Processing Symposium (IPDPS 2014): proceedings: Phoenix, Arizona, USA: 19-23 May 2014
upcommons.citation.startingPage941
upcommons.citation.endingPage951


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