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dc.contributor.authorFilgueras Izquierdo, Antonio
dc.contributor.authorGil Blasco, Eduard
dc.contributor.authorJiménez González, Daniel
dc.contributor.authorÁlvarez Martínez, Carlos
dc.contributor.authorMartorell Bofill, Xavier
dc.contributor.authorLanger, Jan
dc.contributor.authorNoguera Serra, Juan José
dc.contributor.authorVissers, Kees
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2014-09-16T11:03:57Z
dc.date.created2014
dc.date.issued2014
dc.identifier.citationFilgueras, A. [et al.]. OmpSs@Zynq All-Programmable SoC Ecosystem. A: ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. "FPGA'14: Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays". Monterey, California: Association for Computing Machinery (ACM), 2014, p. 137-146.
dc.identifier.isbn978-1-4503-2671-1
dc.identifier.urihttp://hdl.handle.net/2117/24066
dc.description.abstractOmpSs is an OpenMP-like directive-based programming model that includes heterogeneous execution (MIC, GPU, SMP, etc.) and runtime task dependencies management. Indeed, OmpSs has largely influenced the recently appeared OpenMP 4.0 specification. Zynq All-Programmable SoC combines the features of a SMP and a FPGA and benefits DLP, ILP and TLP parallelisms in order to efficiently exploit the new technology improvements and chip resource capacities. In this paper, we focus on programmability and heterogeneous execution support, presenting a successful combination of the OmpSs programming model and the Zynq All-Programmable SoC platforms.
dc.format.extent10 p.
dc.language.isoeng
dc.publisherAssociation for Computing Machinery (ACM)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshField programmable gate arrays
dc.subject.otherHeterogenous parallel programming model
dc.subject.otherTask dataflow models
dc.subject.otherAutomatic hardware generation
dc.titleOmpSs@Zynq All-Programmable SoC Ecosystem
dc.typeConference report
dc.subject.lemacMatrius de portes programables per l'usuari
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1145/2554688.2554777
dc.description.peerreviewedPeer Reviewed
dc.rights.accessRestricted access - publisher's policy
drac.iddocument12968284
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
upcommons.citation.authorFilgueras, A.; Gil, E.; Jimenez, D.; Alvarez, C.; Martorell, X.; Langer, J.; Noguera, J.; Vissers, K.
upcommons.citation.contributorACM/SIGDA International Symposium on Field-Programmable Gate Arrays
upcommons.citation.pubplaceMonterey, California
upcommons.citation.publishedtrue
upcommons.citation.publicationNameFPGA'14: Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays
upcommons.citation.startingPage137
upcommons.citation.endingPage146


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