Deconstructing bus access control policies for real-time multicores
Tipus de documentText en actes de congrés
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés restringit per política de l'editorial
Projecte de la Comissió EuropeaPARMERASA - Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability (EC-FP7-287519)
Multicores may satisfy the growing performance requirements of critical Real-Time systems which has made industry to consider them for future real-time systems. In a multicore, the bus contention-control policy plays a key role in system's performance and the tightness of the Worst-Case Execution Time (WCET) estimates. In this paper we develop analytical models of the contention that requests from different tasks running in different cores suffer for the two most-used contention control policies: Time-Division Multiple Access (TDMA) and Interference-Aware Bus Arbiter (IABA), which allows us to compare them. We further show the benefits of having such models for real-time system designers and chip providers. Our results show that WCET estimates obtained with TDMA are slightly (2%) tighter than those obtained with IABA, at the cost of knowing the exact cycle at which every access of every task accesses the bus. However, average performance is 10% worse with TDMA than with IABA. Overall, IABA is the most appealing contention-control policy since it allows achieving tight WCET estimates and high average performance with little burden for the user.
CitacióJalle, J. [et al.]. Deconstructing bus access control policies for real-time multicores. A: IEEE International Symposium on Industrial Embedded Systems. "Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems: SIES 2013: Porto, Portugal, June 19-21, 2013". Porto: Institute of Electrical and Electronics Engineers (IEEE), 2013, p. 31-38.