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dc.contributor.authorDarus, Rosheila
dc.contributor.authorPou Félix, Josep
dc.contributor.authorKonstantinou, Georgios
dc.contributor.authorCeballos Recio, Salvador
dc.contributor.authorAgelidis, Vassilios
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2014-06-05T09:20:58Z
dc.date.created2014
dc.date.issued2014
dc.identifier.citationDarus, R. [et al.]. A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM. A: IEEE Applied Power Electronics Conference and Exposition. "Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC". Texas: 2014, p. 255-260.
dc.identifier.isbn978-147992325-0
dc.identifier.urihttp://hdl.handle.net/2117/23161
dc.description.abstractThis paper introduces a low complexity implementation of the voltage balancing sorting algorithm to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). Two modulation techniques are evaluated; staircase modulation and phase-disposition pulse-width modulation (PD-PWM) under the conventional and the proposed algorithm. Using a circulating current controller in an MMC with 12 sub-modules per arm, PD-PWM yields better results compared to the staircase modulation technique. The test condition for this comparison is such that the power devices operate at a similar switching frequency and produce similar amplitudes to the capacitor voltage ripples in both modulation techniques. The results are verified through extensive simulations and experimentally using a phase-leg MMC laboratory prototype.
dc.format.extent6 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.lcshElectric currents
dc.subject.lcshRotary converters
dc.subject.lcshModulation (Electronics)
dc.subject.otherCapacitor voltage balancing
dc.subject.otherModular multilevel converter
dc.subject.otherModulation technique
dc.subject.otherPulse-width modulation
dc.titleA modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM
dc.typeConference report
dc.subject.lemacCorrents elèctrics
dc.subject.lemacConvertidors rotatius
dc.subject.lemacModulació (Electrònica)
dc.contributor.groupUniversitat Politècnica de Catalunya. TIEG - Terrassa Industrial Electronics Group
dc.identifier.doi10.1109/APEC.2014.6803318
dc.description.peerreviewedPeer Reviewed
dc.rights.accessRestricted access - publisher's policy
drac.iddocument14916123
dc.description.versionPostprint (updated version)
dc.date.lift10000-01-01
upcommons.citation.authorDarus, R.; Pou, J.; Konstantinou, G.; Ceballos, S.; Agelidis, V.
upcommons.citation.contributorIEEE Applied Power Electronics Conference and Exposition
upcommons.citation.pubplaceTexas
upcommons.citation.publishedtrue
upcommons.citation.publicationNameConference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
upcommons.citation.startingPage255
upcommons.citation.endingPage260


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