Design of an on–chip linear–assisted DC–DC voltage regulator
Document typeConference lecture
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
This article shows the design of an on-chip CMOS linear-assisted DC-DC regulator. It results a good alternative topology to classic switching DC-DC power converters. In the presented technique, an auxiliary linear regulator is used to cancel the output voltage ripple and provides fast responses for load and line variations. On the other hand, a switching converter, connected in parallel, allows supplying almost the whole output current demanded by the load. The objective of this linear-assisted regulator or hybrid topology is to achieve a high efficiency of switching converters, with suitable load and line regulation features, typical of linear regulators. In this kind of on-chip applications, CMOS is the current prevailing technology. Thus, in order to implement on-chip power supply systems and on-chip power management systems with low to medium current consumption, this structure has good features.
CitationCosp, J.; Martinez, H. Design of an on–chip linear–assisted DC–DC voltage regulator. A: IEEE International Conference on Electronics, Circuits and Systems. "Proceedings of the 20th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2013)". Abu Dhabi: Institute of Electrical and Electronics Engineers (IEEE), 2013, p. 353-356.
- AHA - Advanced Hardware Architectures Group - Ponències/Comunicacions de congressos 
- EPIC - Disseny de circuits analògics integrats i de convertidors de potencia conmutats - Ponències/Comunicacions de congressos 
- Departament d'Enginyeria Electrònica - Ponències/Comunicacions de congressos 
|103_6293.pdf||Article Complet||521,9Kb||Restricted access|