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BIST Architecture to Detect Defects in TSVs During Pre-Bond Testing
| dc.contributor.author | Arumi Delgado, Daniel |
| dc.contributor.author | Rodríguez Montañés, Rosa |
| dc.contributor.author | Figueras Pàmies, Joan |
| dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
| dc.date.accessioned | 2013-10-31T11:34:26Z |
| dc.date.created | 2013 |
| dc.date.issued | 2013 |
| dc.identifier.citation | Arumi, D.; Rodriguez, R.; Figueras, J. BIST Architecture to Detect Defects in TSVs During Pre-Bond Testing. A: IEEE European Test Symposium. "Proceedings of 18th IEEE European Test Symposium". Avignon: Institute of Electrical and Electronics Engineers (IEEE), 2013. |
| dc.identifier.isbn | 978-1-4673-6377-8 |
| dc.identifier.uri | http://hdl.handle.net/2117/20505 |
| dc.description | built-in self test integrated circuit testing three-dimensional integrated circuits |
| dc.description.abstract | Through Silicon Vias (TSVs) are critical elements in three dimensional integrated circuits (3-D ICs). The detection of defective TSVs in the earliest process step is of major concern. Hence, testing TSVs is usually done at different stages of the fabrication process. In this context, this work proposes a simple pre-bond GIST architecture to improve the detection of hard and weak defects |
| dc.language.iso | eng |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
| dc.subject.lcsh | Integrated circuits |
| dc.subject.lcsh | Three-dimensional integrated circuits |
| dc.subject.other | built-in self test integrated circuit testing three-dimensional integrated circuits |
| dc.title | BIST Architecture to Detect Defects in TSVs During Pre-Bond Testing |
| dc.type | Conference report |
| dc.subject.lemac | Circuits integrats |
| dc.contributor.group | Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
| dc.identifier.doi | 10.1109/ETS.2013.6569389 |
| dc.relation.publisherversion | http://www.computer.org/csdl/proceedings/ets/2013/6376/00/06569389-abs.html |
| dc.rights.access | Restricted access - publisher's policy |
| local.identifier.drac | 12791947 |
| dc.description.version | Postprint (published version) |
| dc.date.lift | 10000-01-01 |
| local.citation.author | Arumi, D.; Rodriguez, R.; Figueras, J. |
| local.citation.contributor | IEEE European Test Symposium |
| local.citation.pubplace | Avignon |
| local.citation.publicationName | Proceedings of 18th IEEE European Test Symposium |