Yield estimation model for lithography hotspot distortions

Thumbnail
View/Open
Article principal (102,2Kb) (Restricted access)
Gómez Fernández, Sergio
Moll Echeto, Francisco de BorjaMés informacióMés informació
Document typeArticle
Date issued2013-08-15
PublisherInstitution of Electrical Engineers
Rights accessRestricted access - publisher's policy
European Commisision's project
SYNAPTIC - SYNthesis using Advanced Process Technology Integrated in regular Cells, IPs, architectures, and design platforms (EC-FP7-248538)
Abstract
CitationGomez, S.; Moll, F. Yield estimation model for lithography hotspot distortions. "Electronics Letters", 15 Agost 2013, vol. 49, núm. 17, p. 1066-1068. 
URIhttp://hdl.handle.net/2117/20390
DOI10.1049/el.2013.0469
ISSN0013-5194
Publisher versionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6583109
Collections

FilesDescriptionSizeFormatView
yield.pdfBlockedArticle principal102,2KbPDFRestricted access
Except where otherwise noted, content on this work is licensed under a Creative Commons license: Attribution-NonCommercial-NoDerivs 3.0 Spain