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Mitigation strategies of the variability in 3T1D cell memories scaled beyond 22nmAward-winning

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hdl:2117/20163

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Amat Bertran, Esteve
García Almudéver, Carmen
Aymerich Capdevila, Nivard
Canal Corretger, RamonMés informacióMés informacióMés informació
Rubio Sola, Jose AntonioMés informacióMés informacióMés informació
Document typeConference report
Defense date2012
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
Abstract
3T1D cell has been stated as a valid alternative to be implemented on L1 memory cache to substitute 6T, highly affected by device variability. In this contribution, we have shown that 22nm 3T1D memory cells present significant tolerance to high levels of device parameter fluctuation. Moreover, we have observed that the variability of the write access transistor has turn into the more detrimental device for the 3T1D cell performance. Furthermore, resizing and temperature control have been presented as some strategies to mitigate the cell variability.
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Best DCIS Paper Award 2012
CitationAmat, E. [et al.]. Mitigation strategies of the variability in 3T1D cell memories scaled beyond 22nm. A: Conference on Design of Circuits and Integrated Systems. "Proceedings of DCIS 2012 : XXVII Design of Circuits and Integrated Systems Conference". Avignon: 2012, p. 1-5. 
Award-winningAward-winning
URIhttp://hdl.handle.net/2117/20163
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  • Departament d'Enginyeria Electrònica - Ponències/Comunicacions de congressos [1.819]
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