dc.contributor.author Suñé, Víctor dc.contributor.author Rodríguez Montañés, Rosa dc.contributor.author Carrasco, Juan A. dc.contributor.author Munteanu, D-P dc.contributor.other Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica dc.date.accessioned 2013-08-01T08:00:55Z dc.date.available 2013-08-01T08:00:55Z dc.date.created 2003 dc.date.issued 2003 dc.identifier.citation Suñe, V. [et al.]. A combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip. A: IEEE/IFIP International Conference on Dependable Systems and Networks. "Proc. IEEE Int. Conf. on Dependable Systems and Networks". 2003, p. 563-572. dc.identifier.uri http://hdl.handle.net/2117/20054 dc.description.abstract In this paper we develop a combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip. The method assumes that defects are produced according to a model in which defects are lethal and affect given components of the system following a distribution common to all defects. The distribution of the number of defects is arbitrary. The method is based on the formulation of the yield as 1 minus the probability that a given boolean function with multiple-valued variables has value 1. That probability is computed by analyzing a ROMDD (reduced ordered multiple-valuedecision diagram) representation of the function. For efficiency reasons, we first build a coded ROBDD (reduced ordered binary decision diagram) representation of the function and then transform that coded ROBDD into the ROMDD required by the method. We present numerical experiments showing that the method is able to cope with quite large systems in moderate CPU times. dc.format.extent 10 p. dc.language.iso eng dc.rights Attribution-NonCommercial-NoDerivs 3.0 Spain dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/3.0/es/ dc.subject Àrees temàtiques de la UPC::Matemàtiques i estadística::Estadística matemàtica dc.subject.lcsh Combinatorial analysis dc.title A combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip dc.type Conference report dc.subject.lemac Anàlisi combinatòria dc.contributor.group Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat dc.rights.access Open Access local.identifier.drac 2384215 dc.description.version Postprint (published version) local.citation.author Suñe, V.; Rodriguez, R.; Carrasco, J.; Munteanu, D.-P. local.citation.contributor IEEE/IFIP International Conference on Dependable Systems and Networks local.citation.publicationName Proc. IEEE Int. Conf. on Dependable Systems and Networks local.citation.startingPage 563 local.citation.endingPage 572
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