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dc.contributor.authorCarrasco, Juan A.
dc.contributor.authorSuñé, Víctor
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2013-08-01T07:42:29Z
dc.date.available2013-08-01T07:42:29Z
dc.date.created2009-02
dc.date.issued2009-02
dc.identifier.citationCarrasco, J.; Suñe, V. An ROBDD-based combinatorial method for the evaluation of yield of defect-tolerant systems-on-chip. "IEEE transactions on very large scale integration (VLSI) systems", Febrer 2009, vol. 17, núm. 2, p. 207-220.
dc.identifier.issn1063-8210
dc.identifier.urihttp://hdl.handle.net/2117/20052
dc.description.abstractIn this paper, we develop a combinatorial method for the evaluation of the functional yield of defect-tolerant systems-on chip (SoC). The method assumes that random manufacturing defects are produced according to a model in which defects cause the failure of given components of the system following a distribution common to all defects. The distribution of the number of defects is arbitrary. The yield is obtained by conditioning on the number of defects that result in the failure of some component and performing recursive computations over a reduced ordered binary decision diagram (ROBDD) representation of the fault-tree function of the system. The method has excellent error control. Numerical experiments seem to indicate that the method is efficient and, with some exceptions, allows the analysis with affordable computational resources of systems with very large numbers of components.
dc.format.extent14 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Matemàtiques i estadística::Estadística matemàtica
dc.subject.lcshCombinatorial analysis
dc.titleAn ROBDD-based combinatorial method for the evaluation of yield of defect-tolerant systems-on-chip
dc.typeArticle
dc.subject.lemacAnàlisi combinatòria
dc.contributor.groupUniversitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat
dc.rights.accessOpen Access
drac.iddocument673083
dc.description.versionPostprint (published version)
upcommons.citation.authorCarrasco, J.; Suñe, V.
upcommons.citation.publishedtrue
upcommons.citation.publicationNameIEEE transactions on very large scale integration (VLSI) systems
upcommons.citation.volume17
upcommons.citation.number2
upcommons.citation.startingPage207
upcommons.citation.endingPage220


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