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dc.contributor.authorPrat Pérez, Arnau
dc.contributor.authorDomínguez Sal, David
dc.contributor.authorLarriba Pey, Josep
dc.contributor.authorTroncoso, Pedro
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2013-07-30T12:17:36Z
dc.date.created2013
dc.date.issued2013
dc.identifier.citationPrat, A. [et al.]. Producer-consumer: the programming model for future many-core processors. A: International Conference on Architecture of Computing Systems. "ARCS 2013: 26th International Conference on Architecture of Computing Systems: Prague, Czech Republic: February 19-22, 2013: proceedings". Praga: Springer, 2013, p. 110-121.
dc.identifier.isbn978-364236423-5
dc.identifier.urihttp://hdl.handle.net/2117/20034
dc.description.abstractThe massive addition of cores on a chip is adding more pressure to the accesses to main memory. In order to avoid this bottleneck, we propose the use of a simple producer-consumer model, which allows for the temporary results to be transferred directly from one task to another. These data transfer operations are performed within the chip, using on-chip memory, thus avoiding costly off-chip memory accesses. We implement this model on a real many-core processor, the 48-core Intel Single-chip Cloud Computer processor using its on-chip memory facilities. We find that the Producer-Consumer model adapts to such architectures and allow to achieve good task and data parallelism. For the evaluation of the proposed platform we implement a graph-based application using the Producer- Consumer model. Our tests show that the model scales very well as it takes advantage of the on-chip memory. The execution times of our implementation are up to 9 times faster than the baseline implementation, which relies on storing the temporary results to main memory.
dc.format.extent12 p.
dc.language.isoeng
dc.publisherSpringer
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshComputer architecture
dc.subject.otherData parallelism
dc.subject.otherExecution time
dc.subject.otherGraph-based
dc.subject.otherMain memory
dc.subject.otherMany-core processors
dc.subject.otherModel scale
dc.subject.otherOff-chip memories
dc.subject.otherOn chip memory
dc.subject.otherProgramming models
dc.subject.otherSingle-chip cloud computers
dc.titleProducer-consumer: the programming model for future many-core processors
dc.typeConference report
dc.subject.lemacArquitectura d'ordinadors
dc.contributor.groupUniversitat Politècnica de Catalunya. DAMA-UPC - Data Management Group
dc.identifier.doi10.1007/978-3-642-36424-2_10
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://dl.acm.org/citation.cfm?id=2450037
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac11858005
dc.description.versionPostprint (published version)
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/FP7/287759/EU/High Performance and Embedded Architecture and Compilation/HIPEAC
dc.date.lift10000-01-01
local.citation.authorPrat, A.; Dominguez, D.; Larriba, J.; Troncoso, P.
local.citation.contributorInternational Conference on Architecture of Computing Systems
local.citation.pubplacePraga
local.citation.publicationNameARCS 2013: 26th International Conference on Architecture of Computing Systems: Prague, Czech Republic: February 19-22, 2013: proceedings
local.citation.startingPage110
local.citation.endingPage121


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