Producer-consumer: the programming model for future many-core processors
Document typeConference report
Rights accessRestricted access - publisher's policy
European Commisision's projectHIPEAC - High Performance and Embedded Architecture and Compilation (EC-FP7-287759)
The massive addition of cores on a chip is adding more pressure to the accesses to main memory. In order to avoid this bottleneck, we propose the use of a simple producer-consumer model, which allows for the temporary results to be transferred directly from one task to another. These data transfer operations are performed within the chip, using on-chip memory, thus avoiding costly off-chip memory accesses. We implement this model on a real many-core processor, the 48-core Intel Single-chip Cloud Computer processor using its on-chip memory facilities. We find that the Producer-Consumer model adapts to such architectures and allow to achieve good task and data parallelism. For the evaluation of the proposed platform we implement a graph-based application using the Producer- Consumer model. Our tests show that the model scales very well as it takes advantage of the on-chip memory. The execution times of our implementation are up to 9 times faster than the baseline implementation, which relies on storing the temporary results to main memory.
CitationPrat, A. [et al.]. Producer-consumer: the programming model for future many-core processors. A: International Conference on Architecture of Computing Systems. "ARCS 2013: 26th International Conference on Architecture of Computing Systems: Prague, Czech Republic: February 19-22, 2013: proceedings". Praga: Springer, 2013, p. 110-121.
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