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dc.contributor.authorVega, Didac
dc.contributor.authorNajar, R.
dc.contributor.authorPina, Maria
dc.contributor.authorRodríguez Martínez, Ángel
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2013-06-12T17:15:53Z
dc.date.created2013
dc.date.issued2013
dc.identifier.citationVega, D. [et al.]. Macroporous silicon FET transistors for power applications. A: Spanish Conference on Electron Devices. "Proceedings of the 2013 Spanish Conference on Electron Devices: CDE 2013: February 12-14, 2013: Valladolid, Spain". Valladolid: Institute of Electrical and Electronics Engineers (IEEE), 2013, p. 91-94.
dc.identifier.isbn978-1-4673-4666-5
dc.identifier.urihttp://hdl.handle.net/2117/19546
dc.description.abstractIn this paper we propose the use of macroporous silicon for microelectronic devices. We propose and study four different FET transistor structures using macroporous silicon as base material. Macroporous silicon is a novel material whose application most commonly suggested is as photonic crystals. Nevertheless, this is a versatile structured material with applications in many different areas, though microelectronics is not usually cited. We suggest its use for electronics devices as a FET transistor. The presented structures are studied by simulation in device modelling software (TCAD). Two kinds of operation modes have been considered: vertical (axial) and horizontal (transverse) in relation to the etched pores in silicon. One of the notable features of the described structures is the ability to have a massive number of identical unitary-cell transistor devices operating in parallel, having an all-around gate. These features allow driving the gate with low controlling voltages while handling large current density. Furthermore, the external device volume remains small thanks to the very large area-to-volume ratio. Thanks to the considerable amount of active area achievable, we further propose the use of such devices for low-voltage power applications. In this paper we present the obtained results of our simulations of the proposed devices.
dc.format.extent4 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Components electrònics::Transistors
dc.subject.lcshTransistors
dc.subject.lcshSilicon
dc.subject.otherPorous silicon
dc.subject.otherComputer software
dc.subject.otherElectron devices
dc.subject.otherMicroelectronics
dc.subject.otherSilicon
dc.subject.otherTransistors
dc.titleMacroporous silicon FET transistors for power applications
dc.typeConference report
dc.subject.lemacTransistors
dc.subject.lemacSilici
dc.contributor.groupUniversitat Politècnica de Catalunya. MNT - Grup de Recerca en Micro i Nanotecnologies
dc.identifier.doi10.1109/CDE.2013.6481350
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6481350
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac12481251
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
local.citation.authorVega, D.; Najar, R.; Pina, M.; Rodriguez, A.
local.citation.contributorSpanish Conference on Electron Devices
local.citation.pubplaceValladolid
local.citation.publicationNameProceedings of the 2013 Spanish Conference on Electron Devices: CDE 2013: February 12-14, 2013: Valladolid, Spain
local.citation.startingPage91
local.citation.endingPage94


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