Mostra el registre d'ítem simple
Macroporous silicon FET transistors for power applications
dc.contributor.author | Vega, Didac |
dc.contributor.author | Najar, R. |
dc.contributor.author | Pina, Maria |
dc.contributor.author | Rodríguez Martínez, Ángel |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2013-06-12T17:15:53Z |
dc.date.created | 2013 |
dc.date.issued | 2013 |
dc.identifier.citation | Vega, D. [et al.]. Macroporous silicon FET transistors for power applications. A: Spanish Conference on Electron Devices. "Proceedings of the 2013 Spanish Conference on Electron Devices: CDE 2013: February 12-14, 2013: Valladolid, Spain". Valladolid: Institute of Electrical and Electronics Engineers (IEEE), 2013, p. 91-94. |
dc.identifier.isbn | 978-1-4673-4666-5 |
dc.identifier.uri | http://hdl.handle.net/2117/19546 |
dc.description.abstract | In this paper we propose the use of macroporous silicon for microelectronic devices. We propose and study four different FET transistor structures using macroporous silicon as base material. Macroporous silicon is a novel material whose application most commonly suggested is as photonic crystals. Nevertheless, this is a versatile structured material with applications in many different areas, though microelectronics is not usually cited. We suggest its use for electronics devices as a FET transistor. The presented structures are studied by simulation in device modelling software (TCAD). Two kinds of operation modes have been considered: vertical (axial) and horizontal (transverse) in relation to the etched pores in silicon. One of the notable features of the described structures is the ability to have a massive number of identical unitary-cell transistor devices operating in parallel, having an all-around gate. These features allow driving the gate with low controlling voltages while handling large current density. Furthermore, the external device volume remains small thanks to the very large area-to-volume ratio. Thanks to the considerable amount of active area achievable, we further propose the use of such devices for low-voltage power applications. In this paper we present the obtained results of our simulations of the proposed devices. |
dc.format.extent | 4 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Components electrònics::Transistors |
dc.subject.lcsh | Transistors |
dc.subject.lcsh | Silicon |
dc.subject.other | Porous silicon |
dc.subject.other | Computer software |
dc.subject.other | Electron devices |
dc.subject.other | Microelectronics |
dc.subject.other | Silicon |
dc.subject.other | Transistors |
dc.title | Macroporous silicon FET transistors for power applications |
dc.type | Conference report |
dc.subject.lemac | Transistors |
dc.subject.lemac | Silici |
dc.contributor.group | Universitat Politècnica de Catalunya. MNT - Grup de Recerca en Micro i Nanotecnologies |
dc.identifier.doi | 10.1109/CDE.2013.6481350 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6481350 |
dc.rights.access | Restricted access - publisher's policy |
local.identifier.drac | 12481251 |
dc.description.version | Postprint (published version) |
dc.date.lift | 10000-01-01 |
local.citation.author | Vega, D.; Najar, R.; Pina, M.; Rodriguez, A. |
local.citation.contributor | Spanish Conference on Electron Devices |
local.citation.pubplace | Valladolid |
local.citation.publicationName | Proceedings of the 2013 Spanish Conference on Electron Devices: CDE 2013: February 12-14, 2013: Valladolid, Spain |
local.citation.startingPage | 91 |
local.citation.endingPage | 94 |