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dc.contributor.authorHayes, Timothy
dc.contributor.authorPalomar Pérez, Óscar
dc.contributor.authorUnsal, Osman Sabri
dc.contributor.authorCristal Kestelman, Adrián
dc.contributor.authorValero Cortés, Mateo
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2013-05-16T09:15:37Z
dc.date.created2012
dc.date.issued2012
dc.identifier.citationHayes, T. [et al.]. Vector extensions for decision support DBMS acceleration. A: IEEE/ACM International Symposium on Microarchitecture. "Proceedings of the 45th Annual International Symposium on Microarchitecture". Vancouver: IEEE, 2012, p. 166-176.
dc.identifier.urihttp://hdl.handle.net/2117/19276
dc.description.abstractDatabase management systems (DBMS) have become an essential tool for industry and research and are often a significant component of data centres. As a result of this criticality, efficient execution of DBMS engines has become an important area of investigation. This work takes a top-down approach to accelerating decision support systems (DSS) on x86-64 microprocessors using vector ISA exten- sions. In the first step, a leading DSS DBMS is analysed for potential data-level parallelism. We discuss why the existing multimedia SIMD extensions (SSE/AVX) are not suitable for capturing this parallelism and propose a complementary instruction set reminiscent of classical vector architectures. The instruction set is implemented using unin- trusive modifications to a modern x86-64 microarchitecture tailored for DSS DBMS. The ISA and microarchitecture are evaluated using a cycle-accurate x86-64 microarchitectural simulator coupled with a highly-detailed memory simulator. We have found a single oper- ator is responsible for 41% of total execution time for the TPC-H DSS benchmark. Our results show performance speedups between 1.94x and 4.56x for an implementation of this operator run with our proposed hardware modifications.
dc.format.extent11 p.
dc.language.isoeng
dc.publisherIEEE
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshComputer architecture
dc.titleVector extensions for decision support DBMS acceleration
dc.typeConference report
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/MICRO.2012.24
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://delivery.acm.org/10.1145/2460000/2457495/4924a166.pdf?ip=147.83.95.30&acc=ACTIVE%20SERVICE&key=C2716FEBFA981EF161F5D4B6734BF3A99E438D22375C4622&CFID=330243680&CFTOKEN=42804320&__acm__=1368695302_6c5e6c080bb6e9edd9c41abdd561d656
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac11131476
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
local.citation.authorHayes, T.; Palomar, O.; Unsal, O.; Cristal-Kestelman, A.; Valero, M.
local.citation.contributorIEEE/ACM International Symposium on Microarchitecture
local.citation.pubplaceVancouver
local.citation.publicationNameProceedings of the 45th Annual International Symposium on Microarchitecture
local.citation.startingPage166
local.citation.endingPage176


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