Vector extensions for decision support DBMS acceleration
Tipo de documentoTexto en actas de congreso
Fecha de publicación2012
Condiciones de accesoAcceso restringido por política de la editorial
Database management systems (DBMS) have become an essential tool for industry and research and are often a significant component of data centres. As a result of this criticality, efficient execution of DBMS engines has become an important area of investigation. This work takes a top-down approach to accelerating decision support systems (DSS) on x86-64 microprocessors using vector ISA exten- sions. In the first step, a leading DSS DBMS is analysed for potential data-level parallelism. We discuss why the existing multimedia SIMD extensions (SSE/AVX) are not suitable for capturing this parallelism and propose a complementary instruction set reminiscent of classical vector architectures. The instruction set is implemented using unin- trusive modifications to a modern x86-64 microarchitecture tailored for DSS DBMS. The ISA and microarchitecture are evaluated using a cycle-accurate x86-64 microarchitectural simulator coupled with a highly-detailed memory simulator. We have found a single oper- ator is responsible for 41% of total execution time for the TPC-H DSS benchmark. Our results show performance speedups between 1.94x and 4.56x for an implementation of this operator run with our proposed hardware modifications.
CitaciónHayes, T. [et al.]. Vector extensions for decision support DBMS acceleration. A: IEEE/ACM International Symposium on Microarchitecture. "Proceedings of the 45th Annual International Symposium on Microarchitecture". Vancouver: IEEE, 2012, p. 166-176.