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dc.contributor.authorYu, Chenle
dc.contributor.authorRoyuela Alcázar, Sara
dc.contributor.authorQuiñones Moreno, Eduardo
dc.contributor.otherBarcelona Supercomputing Center
dc.contributor.otherUniversitat Politècnica de Catalunya. Doctorat en Arquitectura de Computadors
dc.date.accessioned2020-06-09T10:24:03Z
dc.date.available2020-06-09T10:24:03Z
dc.date.issued2020
dc.identifier.citationYu, C.; Royuela-Alcázar, S.; Quiñones, E. OpenMP to CUDA graphs: a compiler-based transformation to enhance the programmability of NVIDIA devices. A: SCOPES: Software and Compilers for Embedded Systems Conference. "SCOPES '20: Proceedings of the 23th International Workshop on Software and Compilers for Embedded Systems: May 2020". New York, NY, USA: Association for Computing Machinery (ACM), 2020, p. 42-47.
dc.identifier.isbn9781450371315
dc.identifier.urihttp://hdl.handle.net/2117/190303
dc.description.abstractHeterogeneous computing is increasingly being used in a diversity of computing systems, ranging from HPC to the real-time embedded domain, to cope with the performance requirements. Due to the variety of accelerators, e.g., FPGAs, GPUs, the use of high-level parallel programming models is desirable to exploit the performance capabilities of them, while maintaining an adequate productivity level. In that regard, OpenMP is a well-known high-level programming model that incorporates powerful task and accelerator models capable of efficiently exploiting structured and unstructured parallelism in heterogeneous computing. This paper presents a novel compiler transformation technique that automatically transforms OpenMP code into CUDA graphs, combining the benefits of programmability of a high-level programming model such as OpenMP, with the performance benefits of a low-level programming model such as CUDA. Evaluations have been performed on two NVIDIA GPUs from the HPC and embedded domains, i.e., the V100 and the Jetson AGX respectively.
dc.description.sponsorshipThis work has been supported by the EU H2020 project AMPERE under the grant agreement no. 871669.
dc.format.extent6 p.
dc.language.isoeng
dc.publisherAssociation for Computing Machinery (ACM)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
dc.subject.lcshHeterogeneous computing
dc.subject.lcshHigh performance computing
dc.subject.lcshSupercomputers
dc.subject.lcshField programmable gate arrays
dc.subject.lcshGraphics processing units
dc.subject.lcshParallel programming (Computer science)
dc.subject.otherCompiler optimization
dc.subject.otherOpenMP
dc.subject.otherCUDA graphs
dc.subject.otherProgrammability
dc.titleOpenMP to CUDA graphs: a compiler-based transformation to enhance the programmability of NVIDIA devices
dc.typeConference lecture
dc.subject.lemacHeterogeneous computing
dc.subject.lemacSupercomputadors
dc.subject.lemacMatrius de portes programables in situ
dc.subject.lemacUnitats de processament gràfic
dc.subject.lemacProgramació en paral·lel (Informàtica)
dc.identifier.doi10.1145/3378678.3391881
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://dl.acm.org/doi/abs/10.1145/3378678.3391881
dc.rights.accessOpen Access
local.identifier.drac33825855
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/871669/EU/A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimisation/AMPERE
local.citation.contributorSCOPES: Software and Compilers for Embedded Systems Conference
local.citation.pubplaceNew York, NY, USA
local.citation.publicationNameSCOPES '20: Proceedings of the 23th International Workshop on Software and Compilers for Embedded Systems: May 2020
local.citation.startingPage42
local.citation.endingPage47


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