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STT-MRAM for real-time embedded systems: performance and WCET implications

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hdl:2117/187922

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Asifuzzaman, Kazi
Fernández, Mikel
Radojković, Petar
Abella Ferrer, JaumeMés informació
Cazorla Almeida, Francisco Javier
Document typeConference report
Defense date2019
PublisherAssociation for Computing Machinery (ACM)
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
ProjectCOMPUTACION DE ALTAS PRESTACIONES VII (MINECO-TIN2015-65316-P)
ExaNoDe - European Exascale Processor Memory Node Design (EC-H2020-671578)
RYC-2013-14717 (MINECO-RYC-2013-14717)
BARCELONA SUPERCOMPUTING CENTER - CENTRO. NACIONAL DE SUPERCOMPUTACION (MINECO-SEV-2015-0493)
Abstract
STT-MRAM is an emerging non-volatile memory quickly approaching DRAM in terms of capacity, frequency and device size. Intensified efforts in STT-MRAM research by the memory manufacturers may indicate a revolution with STT-MRAM memory technology is imminent, and therefore it is essential to perform system level research to explore use-cases and identify computing domains that could benefit from this technology. Special STT-MRAM features such as intrinsic radiation hardness, non-volatility, zero stand-by power and capability to function in extreme temperatures makes it particularly suitable for aerospace, avionics and automotive applications. Such applications often have real-time requirements --- that is, certain tasks must complete within a strict deadline. Analyzing whether this deadline is met requires Worst Case Execution Time (WCET) Analysis, which is a fundamental part of evaluating any real-time system. In this study, we investigate the feasibility of using STT-MRAM in real-time embedded systems by analyzing average system performance impact and WCET implications.
CitationAsifuzzaman, K. [et al.]. STT-MRAM for real-time embedded systems: performance and WCET implications. A: International Symposium on Memory Systems. "MEMSYS 2019: proceedings of the International Symposium on Memory Systems: Washington DC, September 30–October 3, 2019". New York: Association for Computing Machinery (ACM), 2019, p. 195-205. 
URIhttp://hdl.handle.net/2117/187922
DOI10.1145/3357526.3357531
ISBN978-1-4503-7206-0
Publisher versionhttps://dl.acm.org/doi/10.1145/3357526.3357531
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  • Doctorat en Arquitectura de Computadors - Ponències/Comunicacions de congressos [222]
  • Computer Sciences - Ponències/Comunicacions de congressos [489]
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