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dc.contributor.authorAreekath, Lakshmi
dc.contributor.authorReverter Cubarsí, Ferran
dc.contributor.authorGeorge, Boby
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2020-03-16T12:00:39Z
dc.date.issued2019-09-15
dc.identifier.citationAreekath, L.; Reverter, F.; George, B. An Extended study on an interference-insensitive switched capacitor CDC. "IEEE sensors journal", 15 Setembre 2019, vol. 19, núm. 18, p. 8283-8292.
dc.identifier.issn1530-437X
dc.identifier.urihttp://hdl.handle.net/2117/179980
dc.description.abstractA new Switched Capacitor (SC) Capacitance-to-Digital Converter (CDC) is presented in this paper. Its output exhibits a high-level of insensitivity to interference, by virtue of the conversion mechanism itself. The proposed scheme is a combination of an SC relaxation oscillator and an integrating type analog-to-digital converter (ADC). Its conversion time is independent of the measurand and hence can be set, such that it is an integral multiple of the interference period, unlike in a dual-slope ADC where the de-integration time is a function of the measurand. The final output is proportional to the number of transitions in the oscillator output, which is directly proportional to the value of the sensor capacitance and has negligible sensitivity to the presence of the interference signal. The proposed scheme has been realized and tested as a hardware prototype unit. The non-linearity of the scheme was found to be 0.4%, and the resolution, in terms of the effective number of bits (ENOB), was 11.13, when tested, with sensor capacitance varied from 10 to 32.5 pF. The studies conducted to evaluate the effect of capacitively coupled interference to the sensitive node on the CDC showed that it is negligible for a wide range of magnitude.
dc.format.extent10 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.lcshCapacitors
dc.subject.lcshDigital converters
dc.subject.lcshAnalog-to-digital converters
dc.subject.otherInterference
dc.subject.otherSwitches
dc.subject.otherCapacitance
dc.subject.otherClocks
dc.subject.otherCapacitive sensors
dc.subject.otherCapacitors
dc.titleAn Extended study on an interference-insensitive switched capacitor CDC
dc.typeArticle
dc.subject.lemacConvertidors analògic/digitals
dc.subject.lemacCAPACITADORS
dc.contributor.groupUniversitat Politècnica de Catalunya. e-CAT - Circuits i Transductors Electrònics
dc.identifier.doi10.1109/JSEN.2019.2917760
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/8718387
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac25820316
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
local.citation.authorAreekath, L.; Reverter, F.; George, B.
local.citation.publicationNameIEEE sensors journal
local.citation.volume19
local.citation.number18
local.citation.startingPage8283
local.citation.endingPage8292


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Except where otherwise noted, content on this work is licensed under a Creative Commons license : Attribution-NonCommercial-NoDerivs 3.0 Spain