Power efficient job scheduling by predicting the impact of processor manufacturing variability
Document typeConference report
PublisherAssociation for Computing Machinery (ACM)
Rights accessOpen Access
Modern CPUs suffer from performance and power consumption variability due to the manufacturing process. As a result, systems that do not consider such variability caused by manufacturing issues lead to performance degradations and wasted power. In order to avoid such negative impact, users and system administrators must actively counteract any manufacturing variability. In this work we show that parallel systems benefit from taking into account the consequences of manufacturing variability when making scheduling decisions at the job scheduler level. We also show that it is possible to predict the impact of this variability on specific applications by using variability-aware power prediction models. Based on these power models, we propose two job scheduling policies that consider the effects of manufacturing variability for each application and that ensure that power consumption stays under a system-wide power budget. We evaluate our policies under different power budgets and traffic scenarios, consisting of both single- and multi-node parallel applications, utilizing up to 4096 cores in total. We demonstrate that they decrease job turnaround time, compared to contemporary scheduling policies used on production clusters, up to 31% while saving up to 5.5% energy.
CitationChasapis, D. [et al.]. Power efficient job scheduling by predicting the impact of processor manufacturing variability. A: International Conference on Supercomputing. "ICS 2019: International Conference on Supercomputing: June 26-28, 2019, Phoenix, AZ". New York: Association for Computing Machinery (ACM), 2019, p. 296-307.
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